摘要:
Non-volatile and radiation-hard switching and memory devices using vertical nano-tubes and reversibly held in state by van der Waals' forces and methods of fabricating the devices. Means for sensing the state of the devices include measuring capacitance, and tunneling and field emission currents.
摘要:
Hybrid substrates characterized by semiconductor islands of different crystal orientations and methods of forming such hybrid substrates. The methods involve using a SIMOX process to form an insulating layer. The insulating layer may divide the islands of at least one of the different crystal orientations into mutually aligned device and body regions. The body regions may be electrically floating relative to the device regions.
摘要:
A structure and a method for forming the same. The method includes providing a structure which includes (a) a to-be-patterned layer, (b) a photoresist layer on top of the to-be-patterned layer wherein the photoresist layer includes a first opening, and (c) a cap region on side walls of the first opening. A first top surface of the to-be-patterned layer is exposed to a surrounding ambient through the first opening. The method further includes performing a first lithography process resulting in a second opening in the photoresist layer. The second opening is different from the first opening. A second top surface of the to-be-patterned layer is exposed to a surrounding ambient through the second opening.
摘要:
Design structure embodied in a machine readable medium for designing, manufacturing, or testing a design in which the design structure includes devices formed in a hybrid substrate characterized by semiconductor islands of different crystal orientations. An insulating layer divides the islands of at least one of the different crystal orientations into mutually aligned device and body regions. The body regions may be electrically floating relative to the device regions.
摘要:
Methods of forming low-k dielectric layers for use in the manufacture of semiconductor devices and fabricating semiconductor structures using the low-k dielectric material. The low-k dielectric material comprises carbon nanostructures, like carbon nanotubes or carbon buckyballs, that are characterized by an insulating electronic state. The carbon nanostructures may be converted to the insulating electronic state either before or after a layer containing the carbon nanostructures is formed on a substrate. One approach for converting the carbon nanostructures to the insulating electronic state is fluorination.
摘要:
A field effect transistor is formed having wrap-around, vertically-aligned, dual gate electrodes. Starting with a silicon-on-insulator (SOI) structure having a buried silicon island, a vertical reference edge is defined, by creating a cavity within the SOI structure, and used during two etch-back steps that can be reliably performed. The first etch-back removes a portion of an oxide layer for a first distance over which a gate conductor material is then applied. The second etch-back removes a portion of the gate conductor material for a second distance. The difference between the first and second distances defines the gate length of the eventual device. After stripping away the oxide layers, a vertical gate electrode is revealed that surrounds the buried silicon island on all four side surfaces.
摘要:
A field effect transistor is formed having wrap-around, vertically-aligned, dual gate electrodes. Starting with an silicon-on-insulator (SOI) structure having a buried silicon island, a vertical reference edge is defined, by creating a cavity within the SOI structure, and used during two etch-back steps that can be reliably performed. The first etch-back removes a portion of an oxide layer for a first distance over which a gate conductor material is then applied. The second etch-back removes a portion of the gate conductor material for a second distance. The difference between the first and second distances defines the gate length of the eventual device. After stripping away the oxide layers, a vertical gate electrode is revealed that surrounds the buried silicon island on all four side surfaces.
摘要:
Conductive paths in an integrated circuit are formed using multiple undifferentiated carbon nanotubes embedded in a conductive metal, which is preferably copper. Preferably, conductive paths include vias running between conductive layers. Preferably, composite vias are formed by forming a metal catalyst pad on a conductor at the via site, depositing and etching a dielectric layer to form a cavity, growing substantially parallel carbon nanotubes on the catalyst in the cavity, and filling the remaining voids in the cavity with copper. The next conductive layer is then formed over the via hole.
摘要:
Acceleration and voltage measurement devices and methods of fabricating acceleration and voltage measurement devices. The acceleration and voltage measurement devices including an electrically conductive plate on a top surface of a first insulating layer; a second insulating layer on a top surface of the conductive plate, the top surface of the plate exposed in an opening in the second insulating layer; conductive nanotubes suspended across the opening, and electrically conductive contacts to the nanotubes.
摘要:
A structure and a method for forming the same. The method includes providing a structure which includes (a) a to-be-patterned layer, (b) a photoresist layer on top of the to-be-patterned layer wherein the photoresist layer includes a first opening, and (c) a cap region on side walls of the first opening. A first top surface of the to-be-patterned layer is exposed to a surrounding ambient through the first opening. The method further includes performing a first lithography process resulting in a second opening in the photoresist layer. The second opening is different from the first opening. A second top surface of the to-be-patterned layer is exposed to a surrounding ambient through the second opening.