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公开(公告)号:US20190189533A1
公开(公告)日:2019-06-20
申请号:US16283787
申请日:2019-02-24
申请人: RFHIC Corporation
IPC分类号: H01L23/373 , H01L21/02 , H01L29/778 , H01L29/20
CPC分类号: H01L23/3732 , H01L21/02115 , H01L21/02271 , H01L21/02304 , H01L21/0237 , H01L21/02376 , H01L21/02444 , H01L21/02527 , H01L21/0254 , H01L21/0262 , H01L21/02639 , H01L29/2003 , H01L29/7787
摘要: A semiconductor device structure comprising: a layer of single crystal compound semiconductor material; and a layer of polycrystalline CVD diamond material, wherein the layer of polycrystalline CVD diamond material is bonded to the layer of single crystal compound semiconductor material via a bonding layer having a thickness of less than 25 nm and a thickness variation of no more than 15 nm, wherein an effective thermal boundary resistance (TBReff) as measured by transient thermoreflectance at an interface between the layer of single crystal compound semiconductor material and the layer of polycrystalline CVD diamond material is less than 25 m2 K/GW with a variation of no more than 12 m2 K/GW as measured across the semiconductor device structure, and wherein the layer of single crystal compound semiconductor material has one or both of the following characteristics: a charge mobility of at least 1200 cm2 V−1 s−1; and a sheet resistance of no more than 700 Ω/square.
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公开(公告)号:US20190189423A1
公开(公告)日:2019-06-20
申请号:US16059222
申请日:2018-08-09
发明人: Takaya Ishino , Atsushi Takahashi , Kazunori Zaima
IPC分类号: H01L21/02 , H01L21/027 , H01L21/311 , H01L27/11582
CPC分类号: H01L21/0234 , H01L21/02115 , H01L21/0271 , H01L21/31116 , H01L21/31144 , H01L27/11582
摘要: In one embodiment, a method of manufacturing a semiconductor device includes forming a first film on a substrate. The method further includes performing a first process of forming a concave portion in the first film and forming a second film on a surface of the first film that is exposed in the concave portion by using a first gas containing a carbon element and a fluorine element. The method further includes performing a second process of exposing the second film to a second gas containing a hydrogen element or a fluid generated from the second gas.
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3.
公开(公告)号:US20180342372A1
公开(公告)日:2018-11-29
申请号:US15858891
申请日:2017-12-29
发明人: Qiwei Liang , Srinivas D. Nemani
IPC分类号: H01J37/32 , H05H1/46 , H01L21/3065
CPC分类号: H01J37/3211 , C23C16/26 , C23C16/45565 , C23C16/50 , C23C16/503 , H01J37/3222 , H01J37/3244 , H01J37/32449 , H01J37/32458 , H01J37/32715 , H01J37/32724 , H01J2237/3321 , H01J2237/334 , H01J2237/3341 , H01L21/02115 , H01L21/02274 , H01L21/3065 , H01L21/67017 , H01L21/67103 , H05H1/46 , H05H2001/463 , H05H2001/4652 , H05H2001/4675
摘要: A plasma reactor includes a chamber body having an interior space that provides a plasma chamber, a gas distribution port to deliver a processing gas to the plasma chamber, a workpiece support to hold a workpiece, an antenna array comprising a plurality of monopole antennas extending partially into the plasma chamber, and an AC power source to supply a first AC power to the plurality of monopole antennas. The plurality of monopole antennas are divided into a plurality of groups of monopole antennas, and the AC power source is configured to generate AC power on a plurality of power supply lines at a plurality of different phases, and different groups of monopole antennas are coupled to different power supply lines.
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公开(公告)号:US10074534B2
公开(公告)日:2018-09-11
申请号:US15636239
申请日:2017-06-28
发明人: Swayambhu P. Behera , Shahid Shaikh , Pramit Manna , Mandar B. Pandit , Tersem Summan , Patrick Reilly , Deenesh Padhi , Bok Hoen Kim , Heung Lak Park , Derek R. Witty
IPC分类号: H01L21/02 , H01L21/033 , H01L21/311 , C23C16/26 , C23C16/50
CPC分类号: H01L21/02115 , C23C16/26 , C23C16/50 , H01L21/02274 , H01L21/0337 , H01L21/31116
摘要: Embodiments of the disclosure relate to deposition of a conformal carbon-based material. In one embodiment, the method comprises depositing a sacrificial dielectric layer over a substrate, forming patterned features on the substrate by removing portions of the sacrificial dielectric layer to expose an upper surface of the substrate, introducing a hydrocarbon source, a plasma-initiating gas, and a dilution gas into the processing chamber, generating a plasma in the processing chamber at a deposition temperature of about 80° C. to about 550° C. to deposit a conformal amorphous carbon layer on the patterned features and the exposed upper surface of the substrate, selectively removing the amorphous carbon layer from an upper surface of the patterned features and the upper surface of the substrate using an anisotropic etching process to provide the patterned features filled within sidewall spacers, and removing the patterned features formed from the sacrificial dielectric layer.
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公开(公告)号:US20180253007A1
公开(公告)日:2018-09-06
申请号:US15760206
申请日:2016-08-26
CPC分类号: G03F7/162 , B05C9/14 , B05C11/08 , G01B11/022 , G01B11/06 , G01B11/2433 , G03F7/11 , G03F7/168 , H01L21/02115 , H01L21/02282 , H01L21/0271 , H01L21/0276 , H01L21/6715 , H01L21/67178 , H01L21/67253 , H01L21/67259 , H01L21/67288 , H01L21/67742 , H01L21/67766 , H01L21/681 , H01L22/12 , H01L22/20
摘要: A substrate processing method, includes acquiring a height distribution along a radial direction of a substrate in a peripheral edge portion of a front surface of the substrate, forming an underlayer film on the entire front surface of the substrate so as to correct a drop of a height of the peripheral edge portion based on the height distribution, and forming a resist film on the entire surface of the underlayer
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公开(公告)号:US10037884B2
公开(公告)日:2018-07-31
申请号:US15253301
申请日:2016-08-31
发明人: Fung Suong Ou , Purushottam Kumar , Adrien LaVoie , Ishtak Karim , Jun Qian
IPC分类号: H01L21/311 , H01L21/02 , H01L21/3065
CPC分类号: H01L21/0228 , H01L21/02115 , H01L21/02266 , H01L21/02274 , H01L21/3065 , H01L21/31122 , H01L21/32
摘要: Methods and apparatuses for depositing films in high aspect ratio features and trenches on substrates using atomic layer deposition and deposition of a sacrificial layer during atomic layer deposition are provided. Sacrificial layers are materials deposited at or near the top of features and trenches prior to exposing the substrate to a deposition precursor such that adsorbed precursor on the sacrificial layer is removed in an etching operation for etching the sacrificial layer prior to exposing the substrate to a second reactant and a plasma to form a film.
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7.
公开(公告)号:US10014174B2
公开(公告)日:2018-07-03
申请号:US15602862
申请日:2017-05-23
发明人: Bencherki Mebarki , Pramit Manna , Li Yan Miao , Deenesh Padhi , Bok Hoen Kim , Christopher Dennis Bencher
IPC分类号: H01L21/033 , H01L21/02 , H01L21/311 , H01L21/3105 , H01L21/027
CPC分类号: H01L21/0337 , H01L21/02115 , H01L21/02118 , H01L21/02266 , H01L21/02274 , H01L21/0273 , H01L21/31058 , H01L21/31138 , H01L2221/00
摘要: Embodiments of the disclosure relate to deposition of a conformal organic material over a feature formed in a photoresist or a hardmask, to decrease the critical dimensions and line edge roughness. In various embodiments, an ultra-conformal carbon-based material is deposited over features formed in a high-resolution photoresist. The conformal organic layer formed over the photoresist thus reduces both the critical dimensions and the line edge roughness of the features.
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8.
公开(公告)号:US20180151715A1
公开(公告)日:2018-05-31
申请号:US15824519
申请日:2017-11-28
IPC分类号: H01L29/778 , H01L29/66 , H01L29/808 , H01L29/417 , H01L29/423 , H01L21/265
CPC分类号: H01L29/7787 , H01L21/02115 , H01L21/02236 , H01L21/0415 , H01L21/265 , H01L29/0603 , H01L29/1037 , H01L29/1066 , H01L29/1602 , H01L29/365 , H01L29/41741 , H01L29/42356 , H01L29/45 , H01L29/66045 , H01L29/66462 , H01L29/7725 , H01L29/7781 , H01L29/7788 , H01L29/7802 , H01L29/8083
摘要: A semiconductor structure, device, or vertical field effect transistor is comprised of a drain, a drift layer disposed in a first direction relative to the drain and in electronic communication with the drain, a barrier layer disposed in the first direction relative to the drift layer and in electronic communication with the drain, the barrier layer comprising a current blocking layer and an aperture region, a two-dimensional hole gas-containing layer disposed in the first direction relative to the barrier layer, a gate electrode oriented to alter an energy level of the aperture region when a gate voltage is applied to the gate electrode, and a source in ohmic contact with the two-dimensional hole gas-containing layer. At least one of an additional layer, the drain, the drift region, the current blocking layer, the two-dimensional hole gas-containing layer, and the aperture region comprises diamond.
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公开(公告)号:US09953839B2
公开(公告)日:2018-04-24
申请号:US15240031
申请日:2016-08-18
发明人: Chiara Marchiori , Federico Zipoli
IPC分类号: H01L29/78 , H01L21/20 , H01L21/336 , H01L21/283 , H01L21/28 , H01L29/66 , H01L29/20 , H01L29/51 , H01L21/02
CPC分类号: H01L21/28264 , H01L21/02115 , H01L21/02126 , H01L21/02167 , H01L21/02181 , H01L21/02447 , H01L21/02529 , H01L21/02538 , H01L29/20 , H01L29/517 , H01L29/66522
摘要: This invention relates to an apparatus, system, and method for creating a high-k gate stack structure that includes a passivation layer. The passivation layer can be constructed from a deposition of silicon carbide. The silicon carbide provides robustness against oxidation, which can reduce the capacity of the stack. The silicon carbide is thermodynamically stable during the deposition process and results in a clean interface.
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公开(公告)号:US09859395B2
公开(公告)日:2018-01-02
申请号:US14502882
申请日:2014-09-30
发明人: Gerhard Schmidt , Josef-Georg Bauer , Carsten Schaeffer , Oliver Humbel , Angelika Koprowski , Sirinpa Monayakul
IPC分类号: H01L21/02 , H01L29/66 , H01L29/40 , H01L29/861 , H01L29/739 , H01L29/78 , H01L23/31 , H01L21/283 , H01L29/47 , H01L29/06
CPC分类号: H01L29/66143 , H01L21/02115 , H01L21/02167 , H01L21/0217 , H01L21/02203 , H01L21/283 , H01L23/3171 , H01L23/3192 , H01L29/0615 , H01L29/0638 , H01L29/408 , H01L29/47 , H01L29/7397 , H01L29/7811 , H01L29/7813 , H01L29/8611 , H01L2924/0002 , H01L2924/00
摘要: A semiconductor device includes a semiconductor body with a first surface, a contact electrode arranged on the first surface, and a passivation layer on the first surface adjacent the contact electrode. The passivation layer includes a layer stack with an amorphous semi-insulating layer on the first surface, a first nitride layer on the amorphous semi-insulating layer, and a second nitride layer on the first nitride layer.
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