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    Using cache coherent FPGAS to accelerate post-copy migration
    22.
    发明授权
    Using cache coherent FPGAS to accelerate post-copy migration 有权

    公开(公告)号：US11231949B2

    公开(公告)日：2022-01-25

    申请号：US16048183

    申请日：2018-07-27

    Applicant: VMware, Inc.

    Inventor： Irina Calciu ,  Jayneel Gandhi ,  Aasheesh Kolli ,  Pratap Subrahmanyam

    IPC: G06F9/455 ,  G06F12/0862 ,  G06F12/0815 ,  G06F15/173

    Abstract: Disclosed are embodiments for migrating a virtual machine (VM) from a source host to a destination host while the virtual machine is running on the destination host. The system includes an RDMA facility connected between the source and destination hosts and a device coupled to a local memory, the local memory being responsible for memory pages of the VM instead of the source host. The device is configured to copy pages of the VM to the destination host and to maintain correct operation of the VM by monitoring coherence events, such as a cache miss, caused by the virtual machine running on the destination host. The device services these cache misses using the RDMA facility and copies the cache line satisfying the cache miss to the CPU running the VM. The device also tracks the cache misses to create an access pattern that it uses to predict future cache misses.

    Using cache coherent FPGAS to accelerate remote memory write-back
    23.
    发明授权
    Using cache coherent FPGAS to accelerate remote memory write-back 有权

    公开(公告)号：US11126464B2

    公开(公告)日：2021-09-21

    申请号：US16048178

    申请日：2018-07-27

    Applicant: VMware, Inc.

    Inventor： Irina Calciu ,  Jayneel Gandhi ,  Aasheesh Kolli ,  Pratap Subrahmanyam

    IPC: H04L29/12 ,  G06F9/50 ,  G06F15/173 ,  G06F12/0891 ,  G06F9/455 ,  H04L12/935 ,  H04L29/08

    Abstract: Disclosed is a method for performing write-back operations to maintain coherence of remote memories in a memory pool. When a local application makes a request for a page of memory that is in the memory pool but not local, a device obtains the page through its RDMA facility and thereafter keeps track of the page for any changes made by the application to the page by storing the page locally and monitoring cache coherency events of cache lines that make up the page. If a requested page become dirty, then periodically the dirty cache lines of the dirty page are written back to the remote memory from which the pages were obtained. In addition, all dirty cache lines are written back when the local memory storing the page becomes full or the application closes a region containing the page.

    Using cache coherent FPGAS to accelerate live migration of virtual machines
    24.
    发明授权
    Using cache coherent FPGAS to accelerate live migration of virtual machines 有权

    公开(公告)号：US11099871B2

    公开(公告)日：2021-08-24

    申请号：US16048182

    申请日：2018-07-27

    Applicant: VMware, Inc.

    Inventor： Irina Calciu ,  Jayneel Gandhi ,  Aasheesh Kolli ,  Pratap Subrahmanyam

    IPC: G06F9/455 ,  G06F12/0891

    Abstract: A virtual machine running on a source host is live migrated to a destination host. The source host includes a first processing node with a first processing hardware and a first memory, and a second processing node with a second processing hardware and a second memory. While the virtual machine is running on the first processing hardware, the second processing hardware tracks cache lines of the first processing hardware that become dirty as a result of write operations performed on one or more memory pages of the virtual machine. The dirty cache lines are copied to the destination host in units of a cache line or groups of cache lines.

    Accelerating replication of page tables for multi-socket machines
    26.
    发明授权
    Accelerating replication of page tables for multi-socket machines 有权

    公开(公告)号：US10929295B2

    公开(公告)日：2021-02-23

    申请号：US16255432

    申请日：2019-01-23

    Applicant: VMware, Inc.

    Inventor： Jayneel Gandhi ,  Pratap Subrahmanyam ,  Irina Calciu ,  Aasheesh Kolli

    IPC: G06F12/00 ,  G06F12/0853 ,  G06F12/1045 ,  G06F12/0804 ,  G06F12/0817 ,  G06F12/1009

    Abstract: Described herein is a method for tracking changes made by an application. Embodiments include determining, by a processor, a write-back of a cache line from a hardware unit associated with a socket of a plurality of sockets to a page table entry of a page table in a memory location associated with the processor. Embodiments include adding, by the processor, the cache line to a list of dirty cache lines. Embodiments include, for each respective cache line in the list of dirty cache lines, identifying, by the processor, a memory location associated with a respective socket of the plurality of sockets corresponding to the respective cache line and updating, by the processor, an entry of a page table replica at the memory location based on the respective cache line.

    Using cache coherent FPGAS to accelerate remote access
    27.
    发明授权
    Using cache coherent FPGAS to accelerate remote access 有权

    公开(公告)号：US10761984B2

    公开(公告)日：2020-09-01

    申请号：US16048186

    申请日：2018-07-27

    Applicant: VMware, Inc.

    Inventor： Irina Calciu ,  Jayneel Gandhi ,  Aasheesh Kolli ,  Pratap Subrahmanyam

    IPC: G06F9/455 ,  G06F12/0815 ,  G06F12/0862 ,  G06F12/1009

    Abstract: Disclosed are embodiments for running an application on a local processor when the application is dependent on pages not locally present but contained in a remote host. The system is informed that the pages on which the application depends are locally present. While running, the application encounters a cache miss and a cache line satisfying the miss from the remote host is obtained and provided to the application. Alternatively, the page containing the cache line satisfying the miss is obtained and the portion of the page not including the cache line is stored locally while the cache line is provided to the application. The cache miss is discovered by monitoring coherence events on a coherence interconnect connected to the local processor. In some embodiments, the cache misses are tracked and provide a way to predict a set of pages to be pre-fetched in anticipation of the next cache misses.

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