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21.发明授权Method and apparatus for fast and local anneal of anti-ferromagnetic (AF) exchange-biased magnetic stacks 失效用于快速和局部退火反铁磁（AF）交换偏置磁性堆叠的方法和装置公开(公告)号：US08105445B2
公开(公告)日：2012-01-31
申请号：US12193786
申请日：2008-08-19
CPC分类号： H01L21/67115 , Y10T29/49034 , Y10T117/10 , Y10T117/1016
摘要： A method (and structure) of thermally treating a magnetic layer of a wafer, includes annealing, for a predetermined short duration, a magnetic layer of a single wafer.
摘要翻译： 热处理晶片的磁性层的方法（和结构）包括在预定的短时间内退火单个晶片的磁性层。
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公开(公告)号：US07851875B2
公开(公告)日：2010-12-14
申请号：US12013174
申请日：2008-01-11
IPC分类号： H01L29/84
CPC分类号： B81C1/00182 , B81B2201/0271 , H01L41/0933 , Y10S977/732
摘要： Micro-electromechanical system (MEMS) devices and methods of manufacture thereof are disclosed. In one embodiment, a MEMS device includes a first semiconductive material and at least one trench disposed in the first semiconductive material, the at least one trench having a sidewall. An insulating material layer is disposed over an upper portion of the sidewall of the at least one trench in the first semiconductive material and over a portion of a top surface of the first semiconductive material proximate the sidewall. A second semiconductive material or a conductive material is disposed within the at least one trench and at least over the insulating material layer disposed over the portion of the top surface of the first semiconductive material proximate the sidewall.
摘要翻译： 公开了微机电系统（MEMS）装置及其制造方法。 在一个实施例中，MEMS器件包括第一半导体材料和设置在第一半导体材料中的至少一个沟槽，所述至少一个沟槽具有侧壁。 绝缘材料层设置在第一半导体材料中的至少一个沟槽的侧壁的上部上方，以及靠近侧壁的第一半导体材料的顶表面的一部分之上。 第二半导体材料或导电材料设置在至少一个沟槽内，并且至少在绝缘材料层的上方设置在靠近侧壁的第一半导体材料的顶表面的部分之上。
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公开(公告)号：US20080078983A1
公开(公告)日：2008-04-03
申请号：US11529564
申请日：2006-09-28
申请人： Wolfgang Raberg
发明人： Wolfgang Raberg
IPC分类号： H01L47/00
CPC分类号： H01L45/1625 , H01L45/06 , H01L45/085 , H01L45/142 , H01L45/143 , H01L45/1658
摘要： The invention provides a layer structure comprising a first layer, the first layer comprising chalcogenide material, and a second layer being deposited onto the first layer, the second layer comprising silver and another material which decreases the mobility of silver atoms or ions or alternately the second layer being a seed layer deposited onto the first layer and the second layer comprising copper and optionally other material, a memory cell comprising such layer structure and the processes for manufacturing the layer structure and the memory cell.
摘要翻译： 本发明提供了一种层结构，其包括第一层，第一层包括硫族化物材料，第二层沉积在第一层上，第二层包含银和另一种材料，其降低银原子或离子的迁移率， 层是沉积到第一层上的种子层，第二层包括铜和任选的其它材料，包括这种层结构的存储单元和用于制造层结构和存储单元的工艺。
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24.发明申请Method of fabricating an integrated electronic circuit with programmable resistance cells 有权制造具有可编程电阻单元的集成电子电路的方法公开(公告)号：US20070200155A1
公开(公告)日：2007-08-30
申请号：US11363494
申请日：2006-02-28
CPC分类号： H01L45/085 , H01L45/1233 , H01L45/1266 , H01L45/143 , H01L45/1625
摘要： Method of fabricating an integrated electronic circuit with programmable resistance cells, which comprises providing a substrate; forming an inert electrode; forming a solid electrolyte on the inert electrode; forming an interlayer on the solid electrolyte, the interlayer comprising an active electrode material and nitrogen; and forming an active electrode on the interlayer, the active electrode comprising the active electrode material.
摘要翻译： 制造具有可编程电阻电池的集成电子电路的方法，其包括提供衬底; 形成惰性电极; 在惰性电极上形成固体电解质; 在所述固体电解质上形成中间层，所述中间层包含活性电极材料和氮气; 以及在所述中间层上形成有源电极，所述有源电极包括所述活性电极材料。
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25.发明授权Method of fabricating an integrated electronic circuit with programmable resistance cells 有权制造具有可编程电阻单元的集成电子电路的方法公开(公告)号：US08492810B2
公开(公告)日：2013-07-23
申请号：US11363494
申请日：2006-02-28
CPC分类号： H01L45/085 , H01L45/1233 , H01L45/1266 , H01L45/143 , H01L45/1625
摘要： Method of fabricating an integrated electronic circuit with programmable resistance cells, which comprises providing a substrate; forming an inert electrode; forming a solid electrolyte on the inert electrode; forming an interlayer on the solid electrolyte, the interlayer comprising an active electrode material and nitrogen; and forming an active electrode on the interlayer, the active electrode comprising the active electrode material.
摘要翻译： 制造具有可编程电阻电池的集成电子电路的方法，其包括提供衬底; 形成惰性电极; 在惰性电极上形成固体电解质; 在所述固体电解质上形成中间层，所述中间层包含活性电极材料和氮气; 以及在所述中间层上形成有源电极，所述有源电极包括所述活性电极材料。
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公开(公告)号：US08049490B2
公开(公告)日：2011-11-01
申请号：US12193780
申请日：2008-08-19
IPC分类号： G01R33/09
CPC分类号： G01R33/09 , H03H9/2457 , H03H2009/02496
摘要： Embodiments of the invention are related to MEMS devices and methods. In one embodiment, a MEMS device includes a resonator element comprising a magnetic portion having a fixed magnetization, and at least one sensor element comprising a magnetoresistive portion, wherein a magnetization and a resistivity of the magnetoresistive portion vary according to a proximity of the magnetic portion.
摘要翻译： 本发明的实施例涉及MEMS器件和方法。 在一个实施例中，MEMS器件包括谐振器元件，其包括具有固定磁化强度的磁性部分和至少一个包括磁阻部分的传感器元件，其中磁阻部分的磁化强度和电阻率根据磁性部分的接近度而变化 。
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27.发明授权MRAM structure using sacrificial layer for anti-ferromagnet and method of manufacture 有权用于抗铁磁体的牺牲层的MRAM结构及其制造方法公开(公告)号：US07782577B2
公开(公告)日：2010-08-24
申请号：US11448170
申请日：2006-06-06
摘要： A magnetic random access memory structure comprising an anti-ferromagnetic layer structure, a crystalline ferromagnetic structure physically coupled to the anti-ferromagnetic layer structure and a ferromagnetic free layer structure physically coupled to the crystalline ferromagnetic structure.
摘要翻译： 磁性随机存取存储器结构包括反铁磁层结构，物理耦合到反铁磁层结构的结晶铁磁结构和物理耦合到结晶铁磁结构的铁磁自由层结构。
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28.发明授权Memory having cap structure for magnetoresistive junction and method for structuring the same 失效具有用于磁阻结的帽结构的存储器及其结构化方法公开(公告)号：US07602032B2
公开(公告)日：2009-10-13
申请号：US11117854
申请日：2005-04-29
申请人： Ulrich Klostermann , Chanro Park , Wolfgang Raberg
发明人： Ulrich Klostermann , Chanro Park , Wolfgang Raberg
IPC分类号： H01L29/82
摘要： A memory and method of making a memory is disclosed. In one embodiment, the memory includes a cap structure for a magnetoresistive random access memory device including an etch stop layer formed over an upper magnetic layer of a magnetoresistive junction (MTJ/MCJ) layered structure and a hardmask layer formed over said etch stop layer, wherein said etch stop layer is selected from a material such that an etch chemistry used for removing said hardmask layer has selectivity against etching said etch stop layer material. In a method of opening the hardmask layer, an etch process to remove exposed portions of the hardmask layer is implemented, where the etch process terminates on the etch stop layer.
摘要翻译： 公开了一种存储器和制造存储器的方法。 在一个实施例中，存储器包括用于磁阻随机存取存储器件的盖结构，其包括形成在磁阻结（MTJ / MCJ）分层结构的上磁层上的蚀刻停止层和形成在所述蚀刻停止层上的硬掩模层， 其中所述蚀刻停止层选自材料，使得用于去除所述硬掩模层的蚀刻化学性质对蚀刻所述蚀刻停止层材料具有选择性。 在打开硬掩模层的方法中，实现去除硬掩模层的暴露部分的蚀刻工艺，其中蚀刻工艺在蚀刻停止层上终止。
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公开(公告)号：US07423282B2
公开(公告)日：2008-09-09
申请号：US11483264
申请日：2006-07-06
申请人： Chanro Park , Wolfgang Raberg , Ulrich Klostermann
发明人： Chanro Park , Wolfgang Raberg , Ulrich Klostermann
IPC分类号： H01L29/04
CPC分类号： H01L45/142 , H01L27/2436 , H01L27/2463 , H01L45/085 , H01L45/1233 , H01L45/143 , H01L45/146 , H01L45/1675
摘要： A solid state electrolyte memory structure includes a solid state electrolyte layer, a metal layer on the solid state electrolyte layer, and an etch stop layer on the metal layer.
摘要翻译： 固态电解质存储结构包括固态电解质层，固态电解质层上的金属层和金属层上的蚀刻停止层。
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30.发明授权Method for writing to magnetoresistive memory cells and magnetoresistive memory which can be written to by the method 失效用于写入可通过该方法写入的磁阻存储器单元和磁阻存储器的方法公开(公告)号：US07408803B2
公开(公告)日：2008-08-05
申请号：US10642856
申请日：2003-08-18
IPC分类号： G11C11/00
CPC分类号： G11C11/1675
摘要： A method for writing to the magnetoresistive memory cells of a MRAM memory, includes applying write currents respectively onto a word line and a bit line. A superposition of the magnetic fields generated by the write currents in each memory cell selected by the corresponding word lines and bits lines alter a direction of the magnetization thereof. According to the method, the write currents are applied in a chronologically offset manner, to the corresponding word line and the bit line whereby the direction of magnetization of the selected memory cell is rotated in several consecutive steps in the desired direction for writing a logical “0” or “1”.
摘要翻译： 一种用于写入MRAM存储器的磁阻存储单元的方法，包括分别将写入电流施加到字线和位线上。 由相应的字线和位线选择的每个存储单元中的写入电流产生的磁场的叠加改变了其磁化方向。 根据该方法，以时间顺序偏移的方式将写入电流施加到对应的字线和位线，由此所选择的存储器单元的磁化方向在所需方向上以几个连续的步骤旋转，以写入逻辑“ 0“或”1“。
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