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公开(公告)号:US20070000971A1
公开(公告)日:2007-01-04
申请号:US11477741
申请日:2006-06-30
申请人: Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru Ito , Takashi Fujise , Junichi Karasawa , Satoru Kodaira , Takayuki Saiki , Hiroyuki Takamiya
发明人: Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru Ito , Takashi Fujise , Junichi Karasawa , Satoru Kodaira , Takayuki Saiki , Hiroyuki Takamiya
IPC分类号: A47J36/02
CPC分类号: H01L27/0207 , G09G3/3688 , H01L27/105 , H01L27/11 , H01L27/1116
摘要: An integrated circuit device includes first and second transistors NTr1 and PTr1 push-pull connected between first and second power supply lines and outputting a voltage of one of the first and second power supply lines to a connection node ND by a charge-pump operation, and a pad PD electrically connected with the connection node ND and electrically connected with a flying capacitor, to which a given voltage is applied at one end, at the other end of the flying capacitor. The pad PD is disposed in an upper layer of at least one of the first and second transistors NTr1 and PTr1 so that the pad PD overlaps part or the entirety of at least one of the first and second transistors NTr1 and PTr1.
摘要翻译: 集成电路装置包括连接在第一和第二电源线之间的第一和第二晶体管NTr1和PTr1推挽,并通过电荷泵操作将第一和第二电源线之一的电压输出到连接节点ND 以及与连接节点ND电连接并与在一端施加给定电压的飞跨电容器电连接在浮动电容器的另一端的焊盘PD。 焊盘PD设置在第一和第二晶体管NTr 1和PTr 1中的至少一个的上层中,使得焊盘PD与第一和第二晶体管NTr 1和PTr 1中的至少一个晶体管的一部分或全部重叠。
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22.
公开(公告)号:US20060267679A1
公开(公告)日:2006-11-30
申请号:US11432316
申请日:2006-05-12
申请人: Kazuhiro Maekawa
发明人: Kazuhiro Maekawa
IPC分类号: G06G7/12
CPC分类号: G09G3/3688 , G09G2310/027
摘要: An operational amplifier 100 includes a differential amplifier 110 which includes an N-type differential transistor pair DIF1 to which an input voltage Vin and an output voltage Vout are supplied at respective gates, and an N-type current source transistor CS1 which generates the sum of drain currents of the transistors QN1 and QN2 making up the differential transistor pair DIF1, and amplifies the difference between the input voltage and the output voltage, and a P-type driver transistor DQP1 which is provided on a high potential power supply side, is gate-controlled based on voltage of an output node of the differential amplifier 110, and generates a drain voltage as the output voltage Vout. The current source transistor CS1 is a transistor in which a potential of an impurity layer in which a channel region is formed is set independently of a potential of an impurity layer in which channel regions of other transistors are formed.
摘要翻译: 运算放大器100包括差分放大器110,该差分放大器110包括在各个栅极处提供输入电压Vin和输出电压Vout的N型差分晶体管对DIF1和N型电流源晶体管CS 1,其产生 构成差分晶体管对DIF1的晶体管QN1和QN2的漏极电流之和,并放大输入电压和输出电压之间的差值,以及提供高电位的P型驱动晶体管DQP 1 电源侧基于差分放大器110的输出节点的电压进行栅极控制,并且产生漏极电压作为输出电压Vout。 电流源晶体管CS1是其中形成沟道区的杂质层的电位独立于其中形成其它晶体管的沟道区的杂质层的电位而设置的晶体管。
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公开(公告)号:US06765641B1
公开(公告)日:2004-07-20
申请号:US09061075
申请日:1998-04-16
申请人: Masumi Kubo , Yozo Narutaki , Yuko Maruyama , Kazuhiro Maekawa , Takayuki Shimada , Mikio Katayama
发明人: Masumi Kubo , Yozo Narutaki , Yuko Maruyama , Kazuhiro Maekawa , Takayuki Shimada , Mikio Katayama
IPC分类号: G02F1136
CPC分类号: G02F1/136286 , G02F1/136227
摘要: A display device, with a pair of substrates provided so as to face each other with a display medium interposed therebetween, includes, on a first substrate of the pair of substrates: switching elements disposed in a matrix; scanning lines and signal lines disposed so as to cross each other; and an interlayer insulating film provided so as to have the switching elements, the scanning lines and the signal lines on one surface thereof and pixel electrodes on the other surface thereof. Each of the pixel electrodes is electrically connected to a drain electrode of one of the switching elements via a contact hole which penetrates through the interlayer insulating film. The interlayer insulating film is made of an organic thin film having a high transparency and covers at least the switching elements, the scanning lines and the signal lines. Furthermore, the interlayer insulating film is provided so as to contact directly with the first substrate in a light-transmitting area which is not shaded at least by the switching elements, the scanning lines and the signal lines.
摘要翻译: 一种显示装置,具有设置成彼此相对的一对基板,其间插入有显示介质,所述显示装置在所述一对基板的第一基板上包括:以矩阵状配置的开关元件; 扫描线和信号线布置成彼此交叉; 以及设置成在其一个表面上具有开关元件,扫描线和信号线以及其另一个表面上的像素电极的层间绝缘膜。 每个像素电极经由穿过层间绝缘膜的接触孔电连接到一个开关元件的漏电极。 层间绝缘膜由具有高透明度的有机薄膜制成,并且至少覆盖开关元件,扫描线和信号线。 此外,层间绝缘膜设置成在至少不被开关元件,扫描线和信号线遮蔽的透光区域中与第一基板直接接触。
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24.
公开(公告)号:US06710825B2
公开(公告)日:2004-03-23
申请号:US09919839
申请日:2001-08-02
IPC分类号: G02F1136
CPC分类号: G02F1/133707 , G02F1/134336 , G02F1/136259 , G02F2001/133742
摘要: The liquid crystal display device of this invention includes a first substrate, a second substrate, a liquid crystal layer disposed between the first substrate and the second substrate and a plurality of picture element regions for producing a display. In each of the plurality of picture element regions, a picture element electrode provided on the face of the first substrate facing the liquid crystal layer and a switching element electrically connected to the picture element electrode are provided. The picture element electrode includes a plurality of sub-picture element electrodes and a plurality of contact portions for mutually electrically connecting at least some of the plurality of sub-picture element electrodes. At least one of the plurality of sub-picture element electrodes is electrically connected to the switching element via a plurality of connection paths.
摘要翻译: 本发明的液晶显示装置包括第一基板,第二基板,设置在第一基板和第二基板之间的液晶层和用于产生显示器的多个像素区域。 在多个像素区域的每一个中,设置在与液晶层相对的第一基板的面上设置的像素电极和与图像元件电极电连接的开关元件。 像素电极包括多个子像素电极和用于相互电连接多个子像素电极中的至少一些的多个接触部分。 多个子像素电极中的至少一个经由多个连接路径与开关元件电连接。
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公开(公告)号:US08546808B2
公开(公告)日:2013-10-01
申请号:US13137951
申请日:2011-09-22
申请人: Masumi Kubo , Akihiro Yamamoto , Takashi Ochi , Tetsuhiro Yamaguchi , Naoshi Yamada , Katsuhiko Morishita , Kiyoshi Ogishima , Kazuhiro Maekawa
发明人: Masumi Kubo , Akihiro Yamamoto , Takashi Ochi , Tetsuhiro Yamaguchi , Naoshi Yamada , Katsuhiko Morishita , Kiyoshi Ogishima , Kazuhiro Maekawa
IPC分类号: H01L29/04
CPC分类号: G02F1/1393 , G02F1/133707
摘要: The liquid crystal display device of this invention includes picture element regions each defined by a first electrode provided on a first substrate and a second electrode provided on a second substrate so as to oppose the first electrode via a liquid crystal layer sandwiched therebetween. In each of the picture element regions, the first electrode includes a solid portion and a nonsolid portion. The liquid crystal display device further includes a pair of polarizing plates disposed with polarization axes thereof crossing each other substantially perpendicularly. The polarization axis of one of the pair of polarizing plates is substantially parallel to a direction in which the solid portion extends. When a voltage is applied between the first electrode and the second electrode, in each of the picture element regions, liquid crystal molecules of the liquid crystal layer are in a radially-inclined orientation state.
摘要翻译: 本发明的液晶显示装置包括各自由设置在第一基板上的第一电极和设置在第二基板上的第二电极通过夹在其间的液晶层与第一电极相对限定的像素区域。 在每个像素区域中,第一电极包括固体部分和非固体部分。 液晶显示装置还包括一对偏振片,其偏振轴设置成大致垂直地彼此交叉。 一对偏振片之一的偏振轴基本上平行于固体部分延伸的方向。 当在第一电极和第二电极之间施加电压时,在每个像素区域中,液晶层的液晶分子处于径向倾斜的取向状态。
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公开(公告)号:US08310478B2
公开(公告)日:2012-11-13
申请号:US11477741
申请日:2006-06-30
申请人: Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru Ito , Takashi Fujise , Junichi Karasawa , Satoru Kodaira , Takayuki Saiki , Hiroyuki Takamiya
发明人: Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru Ito , Takashi Fujise , Junichi Karasawa , Satoru Kodaira , Takayuki Saiki , Hiroyuki Takamiya
IPC分类号: G06F3/038
CPC分类号: H01L27/0207 , G09G3/3688 , H01L27/105 , H01L27/11 , H01L27/1116
摘要: An integrated circuit device includes first and second transistors NTr1 and PTr1 push-pull connected between first and second power supply lines and outputting a voltage of one of the first and second power supply lines to a connection node ND by a charge-pump operation, and a pad PD electrically connected with the connection node ND and electrically connected with a flying capacitor, to which a given voltage is applied at one end, at the other end of the flying capacitor. The pad PD is disposed in an upper layer of at least one of the first and second transistors NTr1 and PTr1 so that the pad PD overlaps part or the entirety of at least one of the first and second transistors NTr1 and PTr1.
摘要翻译: 集成电路装置包括连接在第一和第二电源线之间的第一和第二晶体管NTr1和PTr1推挽,并通过电荷泵操作将第一和第二电源线之一的电压输出到连接节点ND,以及 与连接节点ND电连接并与在一端施加给定电压的飞跨电容器电连接在浮动电容器的另一端处的焊盘PD。 焊盘PD设置在第一和第二晶体管NTr1和PTr1中的至少一个的上层中,使得焊盘PD与第一和第二晶体管NTr1和PTr1中的至少一个晶体管的一部分或全部重叠。
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公开(公告)号:US08188544B2
公开(公告)日:2012-05-29
申请号:US11477720
申请日:2006-06-30
申请人: Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru Ito , Takashi Fujise , Junichi Karasawa , Satoru Kodaira , Takayuki Saiki , Hiroyuki Takamiya
发明人: Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru Ito , Takashi Fujise , Junichi Karasawa , Satoru Kodaira , Takayuki Saiki , Hiroyuki Takamiya
IPC分类号: H01L23/62
CPC分类号: G09G3/3688 , G02F1/13452 , G02F2202/28 , G09G3/3696 , G09G2300/0426 , G09G2310/027
摘要: An integrated circuit device includes a pad PDx and an electrostatic discharge protection element ESDx formed in a rectangular region and electrically connected with the pad PDx. The pad PDx is disposed in an upper layer of the electrostatic discharge protection element ESDx so that an arrangement direction of the pads is parallel to a long side direction of the region in which the electrostatic discharge protection element ESDx is formed, and the pad PDx overlaps part or the entirety of the electrostatic discharge protection element ESDx.
摘要翻译: 集成电路器件包括形成在矩形区域中并与焊盘PDx电连接的焊盘PDx和静电放电保护元件ESDx。 垫PDx设置在静电放电保护元件ESDx的上层中,使得焊盘的布置方向平行于形成有静电放电保护元件ESDx的区域的长边方向,并且焊盘PDx重叠 部分或全部静电放电保护元件ESDx。
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公开(公告)号:US08053775B2
公开(公告)日:2011-11-08
申请号:US12656129
申请日:2010-01-19
申请人: Masumi Kubo , Akihiro Yamamoto , Takashi Ochi , Tetsuhiro Yamaguchi , Naoshi Yamada , Katsuhiko Morishita , Kiyoshi Ogishima , Kazuhiro Maekawa
发明人: Masumi Kubo , Akihiro Yamamoto , Takashi Ochi , Tetsuhiro Yamaguchi , Naoshi Yamada , Katsuhiko Morishita , Kiyoshi Ogishima , Kazuhiro Maekawa
IPC分类号: G02F1/1343
CPC分类号: G02F1/133707 , G02F1/134336 , G02F1/136259 , G02F1/1393 , G02F2001/133742
摘要: The liquid crystal display device of this invention includes a plurality of picture element regions each defined by a first electrode provided on a face of a first substrate facing a liquid crystal layer and a second electrode provided on a second substrate so as to oppose the first electrode via the liquid crystal layer sandwiched therebetween. In each of the picture element regions, the first electrode has a plurality of openings and a solid portion, the liquid crystal layer is in a vertical orientation state when no voltage is applied between the first electrode and the second electrode, and when a voltage is applied between the first electrode and the second electrode, a plurality of liquid crystal domains each in a radially-inclined orientation state are respectively formed in the plurality of openings and the solid portion by inclined electrode fields generated at respective edge portions of the openings of the first electrode.
摘要翻译: 本发明的液晶显示装置包括多个像素区域,每个像素区域由设置在面向液晶层的第一基板的表面上的第一电极和设置在第二基板上的与第一电极相对的第二电极限定 通过夹在其间的液晶层。 在每个像素区域中,第一电极具有多个开口和实心部分,当在第一电极和第二电极之间没有施加电压时,液晶层处于垂直取向状态,并且当电压为 施加在第一电极和第二电极之间,在多个开口中分别形成各自处于径向倾斜取向状态的多个液晶畴,并且固体部分通过在第一电极和第二电极的开口的各个边缘部分处产生的倾斜电极场分别形成 第一电极。
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公开(公告)号:US20110128274A1
公开(公告)日:2011-06-02
申请号:US13022995
申请日:2011-02-08
申请人: Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru ITO , Takashi Fujise , Junichi Karasawa , Satoru Kodaira , Takayuki Saiki , Hiroyuki Takamiya
发明人: Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru ITO , Takashi Fujise , Junichi Karasawa , Satoru Kodaira , Takayuki Saiki , Hiroyuki Takamiya
IPC分类号: G06F3/038
CPC分类号: H01L27/0207 , G09G3/3688 , H01L27/105 , H01L27/11 , H01L27/1116
摘要: An integrated circuit device includes first and second transistors NTr1 and PTr1 push-pull connected between first and second power supply lines and outputting a voltage of one of the first and second power supply lines to a connection node ND by a charge-pump operation, and a pad PD electrically connected with the connection node ND and electrically connected with a flying capacitor, to which a given voltage is applied at one end, at the other end of the flying capacitor. The pad PD is disposed in an upper layer of at least one of the first and second transistors NTr1 and PTr1 so that the pad PD overlaps part or the entirety of at least one of the first and second transistors NTr1 and PTr1.
摘要翻译: 集成电路装置包括连接在第一和第二电源线之间的第一和第二晶体管NTr1和PTr1推挽,并通过电荷泵操作将第一和第二电源线之一的电压输出到连接节点ND,以及 与连接节点ND电连接并与在一端施加给定电压的飞跨电容器电连接在浮动电容器的另一端处的焊盘PD。 焊盘PD设置在第一和第二晶体管NTr1和PTr1中的至少一个的上层中,使得焊盘PD与第一和第二晶体管NTr1和PTr1中的至少一个晶体管的一部分或全部重叠。
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公开(公告)号:US07755587B2
公开(公告)日:2010-07-13
申请号:US11477715
申请日:2006-06-30
申请人: Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru Ito , Takashi Fujise , Junichi Karasawa , Satoru Kodaira
发明人: Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru Ito , Takashi Fujise , Junichi Karasawa , Satoru Kodaira
IPC分类号: G09G3/36
CPC分类号: G09G3/3688 , G09G3/2011 , G09G3/2096 , G09G3/3648 , G09G3/3677 , G09G3/3696 , G09G2300/0426 , G09G2310/027 , G09G2310/0278 , G09G2310/0289 , G09G2320/0285 , G09G2320/0673 , G09G2330/028 , G09G2330/04 , G09G2360/18
摘要: An integrated circuit device includes first to Nth circuit blocks CB1 to CBN disposed along a direction D1 when a direction from a first side which is a short side of the integrated circuit device toward a third side opposite to the first side is a direction D1 and a direction from a second side which is a long side of the integrated circuit device toward a fourth side opposite to the second side is a direction D2. At least one of the circuit blocks on both ends of the circuit blocks CB1 to CBN is a scan driver block for driving a scan line. Or, the scan driver block SB is disposed along the direction D1 on the side of the first to Nth circuit blocks in the direction D2.
摘要翻译: 集成电路装置包括:当从集成电路装置的短边的第一侧向与第一侧相反的第三侧的方向为方向D1时,沿着方向D1设置的第一至第N电路块CB1至CBN为方向D1, 从集成电路装置的长边的第二侧向与第二侧相反的第四侧的方向为方向D2。 电路块CB1至CBN的两端的至少一个电路块是用于驱动扫描线的扫描驱动器块。 或者,扫描驱动块SB沿方向D2的第一至第N电路块侧的方向D1设置。
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