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21.发明公开公开(公告)号：US20240048131A1
公开(公告)日：2024-02-08
申请号：US18350380
申请日：2023-07-11
发明人： Marco Borghese
CPC分类号： H03K3/0315 , H02M3/157 , H03K7/08 , H02M1/0025
摘要： A control circuit for a switching stage of an electronic converter includes a PWM signal generator that generates a PWM signal to drive the switching stage of the electronic converter. A loop comparator circuit receives the regulated output voltage of the electronic converter and receives a sum signal from an adder circuit. The loop comparator circuit generates a comparison signal having a first or second logic value in response to the regulated output voltage reaching the sum signal or failing to reach the sum signal. The adder circuit generates the sum signal as a sum of a reference voltage and a programmable offset voltage that is generated by a programmable voltage generator based on a digital word signal. A feedback circuit is coupled to the loop comparator circuit and the PWM signal generator, and provides the digital word signal to the programmable voltage generator.
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公开(公告)号：US20240039404A1
公开(公告)日：2024-02-01
申请号：US18336746
申请日：2023-06-16
申请人： Ambiq Micro, Inc.
发明人： Ivan Bogue , Jesse Coulon , Andre Belanger
摘要： A system for determining a power requirement for a device powered by a buck converter on a system on chip based on Time on pulses (Ton) is disclosed. A buck converter supplies output voltage to enable the device. The buck converter is driven by a Ton pulse generator generating Ton pulses to control charging of a load capacitor. A counter counts the Ton pulses during the supply of output voltage while the device is enabled. A controller is coupled to the counter and the buck converter. The controller determines the power requirement for the device based on the count of the Ton pulses. The power requirement may be used to adjust the trim value to change the width of the Ton pulses for greater energy efficiency.
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公开(公告)号：US20240030822A1
公开(公告)日：2024-01-25
申请号：US18468893
申请日：2023-09-18
发明人： Sungmin YOO , Taehwang KONG , Sangho KIM , Junhyeok YANG , Hyungmin LEE , Yunho LEE , Woojoong JUNG
CPC分类号： H02M3/1588 , H02M3/157 , H02M1/08
摘要： A direct-current (DC)-DC converter includes a converting circuit including an inductor element. The converting circuit is configured to generate an output voltage from an input voltage based on a switching operation. An inductor current emulator is configured to adjust at least one parameter for changing a current peak value of the inductor element in response to a change in a level of the input voltage and is configured to generate an internal voltage based on the at least one parameter, which is adjusted. The inductor current emulator is configured to generate a control signal for controlling the switching operation such that current of the inductor element has a pattern corresponding to a pattern of the internal voltage.
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公开(公告)号：US20230396165A1
公开(公告)日：2023-12-07
申请号：US17877721
申请日：2022-07-29
摘要： A method for operating a switched-mode power converter includes providing to a maximum voltage node as a maximum voltage, a version of the higher of a first voltage on a first node and a second voltage on a second node. The method includes generating a first signal indicating whether to operate the switched-mode power converter in a buck mode of operation or a boost mode of operation based on the first voltage and a first voltage domain based on the maximum voltage. The method includes generating a second signal indicating whether to operate the switched-mode power converter in a buck mode of operation or a boost mode of operation based on the first voltage and a second voltage domain of the first voltage. The method includes combining the first signal and the second signal to generate a digital configuration indicator signal.
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公开(公告)号：US20230327549A1
公开(公告)日：2023-10-12
申请号：US17717752
申请日：2022-04-11
发明人： John Duward Sagona
CPC分类号： H02M3/158 , H02M1/0009 , H02M3/157
摘要： A method of DC-DC power conversion includes converting a DC link voltage to a DC output voltage for a load that is lower than the DC link voltage using a buck converter. The method includes controlling the buck converter in a normal switching mode in response to the DC link voltage being below a predetermined high threshold. The method also includes controlling the buck converter in a rate limited switching mode in response to the DC link voltage being at or above the predetermined high threshold.
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公开(公告)号：US20230291312A1
公开(公告)日：2023-09-14
申请号：US17692297
申请日：2022-03-11
申请人： NXP B.V.
摘要： A boost converter comprises a comparator circuit including: a first input port configured to receive an off-time sawtooth voltage a second input port configured to receive an on-time sawtooth voltage, the comparator circuit comparing the off-time sawtooth voltage and on-time sawtooth voltage to generate trigger signal including a differential ripple voltage that is output by an output port to a power stage circuit. The boost converter further comprises a reference voltage source that provides a reference voltage to the first input port and a feedback circuit that provides the on-time sawtooth voltage to the second port, wherein the differential ripple voltage emulates an inductor current or voltage of an output capacitor of the power stage circuit.
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公开(公告)号：US11757346B2
公开(公告)日：2023-09-12
申请号：US17370674
申请日：2021-07-08
发明人： Maurizio Ricci , Marco Sautto , Simone Bellisai , Eleonora Chiaramonte , Luigi Arpini , Davide Betta
CPC分类号： H02M1/008 , H02M1/0025 , H02M3/156 , H02M3/157 , H02M3/158
摘要： An embodiment circuit comprises first and second output nodes with an inductor arranged therebetween, and first and second switches coupled to opposed ends of the inductor. The switches are switchable between non-conductive and conductive states to control current flow through the inductor and produce first and second output voltages. The current intensity through the inductor is compared with at least one reference value. Switching control circuitry is coupled with the first and second switches, the first and second output nodes, and current sensing circuitry, which is configured to control the switching frequency of the first and second switches as a function of the output voltages and a comparison at the current sensing circuitry. The switching control circuitry is configured to apply FLL-FFWD processing to produce the reference values as a function of a timing signal, targeting maintaining a constant target value for the converter switching frequency.
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公开(公告)号：US20230246550A1
公开(公告)日：2023-08-03
申请号：US18155407
申请日：2023-01-17
发明人： Ranieri Guerra , Leandro Grasso , Serena Angela Versace , Francesca Giacoma Mignemi , Nunzio Greco
CPC分类号： H02M3/1582 , H02M1/08 , H02M3/157
摘要： In accordance with an embodiment, a method of operating a buck-boost power supply includes operating the buck-boost power supply in a buck mode by providing a PWM signal to a first half-bridge circuit, and turning on a charge transfer switch coupled between a first boosted supply node of a second driver circuit coupled to the first half-bridge circuit and a second boosted supply node of a second driver circuit coupled to a second half-bridge circuit when a voltage between the second boosted supply node and an output of the second half-bridge circuit is below a first threshold; and operating the buck-boost power supply in a boost mode by providing a PWM signal to the second half-bridge circuit, and turning on the charge transfer switch when the voltage between the first boosted supply node and an output of the first half-bridge circuit is below a second threshold.
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公开(公告)号：US11682971B2
公开(公告)日：2023-06-20
申请号：US16992612
申请日：2020-08-13
发明人： Johann Erich Bayer , Rüdiger Ganz , Ivan Shumkov
CPC分类号： H02M3/1582 , H02M1/0032 , H02M1/0009 , H02M1/0012 , H02M3/157
摘要： A system has an input and an output. The system includes a voltage converter, including first transistor coupled to the input and to a first switching node, second transistor coupled to the first switching node and to ground, third transistor coupled to a second switching node and to the output, fourth transistor coupled to the second switching node and to ground, and an inductor having a first terminal coupled to the first switching node and a second terminal coupled to the second switching node. The system also includes a controller coupled to the voltage converter, the controller including a state machine and a plurality of drivers to control the transistors of the voltage converter. The state machine is adaptable to cause the second and fourth transistors to conduct and the first and third transistors not to conduct, in response to current through the inductor being less than a current threshold.
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公开(公告)号：US11682967B1
公开(公告)日：2023-06-20
申请号：US17877318
申请日：2022-07-29
申请人： Ambiq Micro, Inc.
发明人： Ivan Bogue , Jesse Coulon , Andre Belanger
摘要： A system for determining a power requirement for a device powered by a buck converter on a system on chip based on Time on pulses (Ton) is disclosed. A buck converter supplies output voltage to enable the device. The buck converter is driven by a Ton pulse generator generating Ton pulses to control charging of a load capacitor. A counter counts the Ton pulses during the supply of output voltage while the device is enabled. A controller is coupled to the counter and the buck converter. The controller determines the power requirement for the device based on the count of the Ton pulses. The power requirement may be used to adjust the trim value to change the width of the Ton pulses for greater energy efficiency.
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