BUCK-BOOST BOOT REFRESHER CIRCUIT
    1.
    发明公开

    公开(公告)号:US20230246550A1

    公开(公告)日:2023-08-03

    申请号:US18155407

    申请日:2023-01-17

    IPC分类号: H02M3/158 H02M1/08 H02M3/157

    CPC分类号: H02M3/1582 H02M1/08 H02M3/157

    摘要: In accordance with an embodiment, a method of operating a buck-boost power supply includes operating the buck-boost power supply in a buck mode by providing a PWM signal to a first half-bridge circuit, and turning on a charge transfer switch coupled between a first boosted supply node of a second driver circuit coupled to the first half-bridge circuit and a second boosted supply node of a second driver circuit coupled to a second half-bridge circuit when a voltage between the second boosted supply node and an output of the second half-bridge circuit is below a first threshold; and operating the buck-boost power supply in a boost mode by providing a PWM signal to the second half-bridge circuit, and turning on the charge transfer switch when the voltage between the first boosted supply node and an output of the first half-bridge circuit is below a second threshold.

    Receiver and corresponding process

    公开(公告)号:US09820141B2

    公开(公告)日:2017-11-14

    申请号:US15279765

    申请日:2016-09-29

    摘要: A receiver for digital signals includes a radiofrequency stage. A feedback loop controls an amplitude of a modulated radiofrequency signal passing through the radiofrequency stage as a function of a comparison of a baseband signal with a reference value. A baseband stage includes an RC network cascaded to the radiofrequency stage and coupled to a baseband detector that generates the baseband signal. The feedback loop includes a circuit for detecting a range of variation of the comparison. The amplitude of the modulated radiofrequency signal is controlled as a function of an end value (e.g., maximum or minimum) of the detected range of variation. A switching circuit operates to selectively short circuit a resistive component of the RC network during receiver start-up.

    SYSTEM FOR GENERATING A CALIBRATION SIGNAL, RELATED TRANSCEIVER AND METHOD
    4.
    发明申请
    SYSTEM FOR GENERATING A CALIBRATION SIGNAL, RELATED TRANSCEIVER AND METHOD 有权
    用于产生校准信号,相关收发器和方法的系统

    公开(公告)号:US20160094378A1

    公开(公告)日:2016-03-31

    申请号:US14829775

    申请日:2015-08-19

    IPC分类号: H04L27/36 H04L7/00

    摘要: A calibration signal is generated from a modulating signal having a first frequency and a carrier signal having a second frequency. A single-sideband mixer modulates the modulating signal on the carrier signal. At least two frequency dividers by two connected in cascade receive the modulating signal modulated on the carrier signal and generate an output of the calibration signal.

    摘要翻译: 从具有第一频率的调制信号和具有第二频率的载波信号产生校准信号。 单边带混频器调制载波信号上的调制信号。 串联连接的至少两个分频器接收在载波信号上调制的调制信号,并产生校准信号的输出。

    Receiver and corresponding process

    公开(公告)号:US10237725B2

    公开(公告)日:2019-03-19

    申请号:US15729852

    申请日:2017-10-11

    摘要: A receiver for digital signals includes a radiofrequency stage. A feedback loop controls a variable attenuation resistance applied to a modulated radiofrequency signal passing through the radiofrequency stage as a function of a comparison of an amplitude of the modulated radiofrequency signal with a reference value. A baseband stage includes an RC network cascaded to the radiofrequency stage and coupled to a baseband detector that generates the baseband signal. The feedback loop includes a circuit for detecting a range of variation of the comparison. The value of the variable resistance is controlled as a function of an end value (e.g., maximum or minimum) of the detected range of variation.

    RECTIFIER CIRCUIT, AND CORRESPONDING DEVICE AND METHOD

    公开(公告)号:US20170288568A1

    公开(公告)日:2017-10-05

    申请号:US15359213

    申请日:2016-11-22

    IPC分类号: H02M7/217

    CPC分类号: H02M7/217 H02M7/219

    摘要: A rectifier cell includes a first cell branch and a second cell branch that extend in parallel between two opposite nodes receiving an a.c. signal. The first cell branch includes a first pair of transistors arranged with their current paths cascaded, with a first intermediate point in-between. The second cell branch includes a second pair of transistors arranged with their current paths cascaded, with a second intermediate point in-between. Each of the pairs of transistors includes a first transistor with a control terminal coupled to one of the two opposite nodes and a second transistor with a control terminal coupled to the other of the two opposite nodes. The bulks of the transistors receive voltages in order to vary the transistor threshold voltage by bringing the threshold voltage to a first value during forward conduction and to a second value during reverse conduction.

    RECEIVER AND CORRESPONDING PROCESS

    公开(公告)号:US20170265062A1

    公开(公告)日:2017-09-14

    申请号:US15279765

    申请日:2016-09-29

    IPC分类号: H04W8/22 H04B17/318

    摘要: A receiver for digital signals includes a radiofrequency stage. A feedback loop controls an amplitude of a modulated radiofrequency signal passing through the radiofrequency stage as a function of a comparison of a baseband signal with a reference value. A baseband stage includes an RC network cascaded to the radiofrequency stage and coupled to a baseband detector that generates the baseband signal. The feedback loop includes a circuit for detecting a range of variation of the comparison. The amplitude of the modulated radiofrequency signal is controlled as a function of an end value (e.g., maximum or minimum) of the detected range of variation. A switching circuit operates to selectively short circuit a resistive component of the RC network during receiver start-up.

    System for the correction of amplitude and phase errors of in-quadrature signals, corresponding receiver and method
    10.
    发明授权
    System for the correction of amplitude and phase errors of in-quadrature signals, corresponding receiver and method 有权
    用于校正正交信号幅度和相位误差的系统,相应的接收机和方法

    公开(公告)号:US09438463B2

    公开(公告)日:2016-09-06

    申请号:US14751339

    申请日:2015-06-26

    摘要: A system may be for the correction of phase and amplitude errors. The system may receive a first input signal and a second input signal and supply a first output signal and a second output signal. The system may include two adders that supply the first and second output signals, respectively. The two adders may be configured for computing a sum of the first and second input signals, and multiplying the weighted sum by a third coefficient. Moreover, the first coefficient or the second coefficient of the first adder may be variable to enable correction of the phase errors, and the third coefficient of the second adder may be variable to enable correction of the amplitude errors.

    摘要翻译: 系统可以用于相位和振幅误差的校正。 系统可以接收第一输入信号和第二输入信号,并提供第一输出信号和第二输出信号。 该系统可以包括分别提供第一和第二输出信号的两个加法器。 两个加法器可以被配置用于计算第一和第二输入信号的和,并将加权和乘以第三系数。 此外,第一加法器的第一系数或第二系数可以是可变的,以使得能够校正相位误差,并且第二加法器的第三系数可以是可变的,以使得校正幅度误差。