ACQUISITION CIRCUIT FOR LOW CHIP RATE OPTION FOR MOBILE TELECOMMUNICATION SYSTEM
    371.
    发明申请
    ACQUISITION CIRCUIT FOR LOW CHIP RATE OPTION FOR MOBILE TELECOMMUNICATION SYSTEM 失效
    用于移动电信系统的低芯片速率选择的采集电路

    公开(公告)号:US20100046404A1

    公开(公告)日:2010-02-25

    申请号:US12605638

    申请日:2009-10-26

    Abstract: A User Equipment (UE) receives and samples communication signals, where the communication signals have a time frame format, a transmission chip rate and a synchronization code associated with a time slot that includes a midamble that indicates a modulation of the synchronization code where a specified modulation of received synchronization codes identifies the timing for a timeslot in which data is to be received. The UE preferably includes a synchronization code determination circuit, a midamble determination circuit, and a phase modulation sequence detection circuit operatively associated with the midamble determination circuit. The UE can be configured for use with the low chip rate option of the Third Generation Partnership Project (3GPP) Universal Mobile Telecommunication System (UMTS) standards that employ a predefined set of downlink SYNC codes that point to midambles which indicate SYNC code modulation sequence to enables reading of data in a subsequent Broadcast Channel (BCH) message.

    Abstract translation: 用户设备(UE)接收和采样通信信号,其中通信信号具有时间帧格式,传输码片速率和与时隙相关联的同步码,所述时隙包括指示同步码的调制的中间码,其中指定 接收到的同步码的调制识别要接收数据的时隙的定时。 UE优选地包括与中间码确定电路可操作地相关联的同步码确定电路,中间码确定电路和相位调制序列检测电路。 UE可以被配置为与第三代合作伙伴计划(3GPP)通用移动电信系统(UMTS)标准的低码片速率选项一起使用,该标准采用指向下一个SYNC码的预定义的一组下行链路SYNC码,其指示SYNC码调制序列到 使得能够在随后的广播信道(BCH)消息中读取数据。

    Intelligent code tracking for spread spectrum systems
    372.
    发明授权
    Intelligent code tracking for spread spectrum systems 失效
    用于扩频系统的智能码跟踪

    公开(公告)号:US07639732B2

    公开(公告)日:2009-12-29

    申请号:US10576966

    申请日:2003-11-04

    CPC classification number: H04B1/7085 H04B2201/7071

    Abstract: A code-tracking system includes a loop filter, which receives an early/late error signal and outputs a loop filter error signal. An error scaling device receives the loop filter error representing an update and provides a code tracking adjustment signal. A controller monitors a frequency of updates and/or a number of same direction updates and provides a filter coefficient in accordance with the frequency of updates and/or the number of same direction updates.

    Abstract translation: 代码跟踪系统包括环路滤波器,其接收早/迟错误信号并输出​​环路滤波器误差信号。 误差缩放装置接收表示更新的环路滤波器误差并提供码跟踪调整信号。 控制器监视更新的频率和/或多个相同的方向更新,并且根据更新的频率和/或相同的方向更新的数量提供滤波器系数。

    Acquisition circuit for low chip rate option for mobile telecommunication system
    374.
    发明授权
    Acquisition circuit for low chip rate option for mobile telecommunication system 失效
    移动通信系统低码率率采购电路

    公开(公告)号:US07627020B2

    公开(公告)日:2009-12-01

    申请号:US12176850

    申请日:2008-07-21

    Abstract: A User Equipment (UE) receives and samples communication signals, where the communication signals have a time frame format, a transmission chip rate and a synchronization code associated with a time slot that includes a midamble that indicates a modulation of the synchronization code where a specified modulation of received synchronization codes identifies the timing for a timeslot in which data is to be received. The UE preferably includes a synchronization code determination circuit, a midamble determination circuit, and a phase modulation sequence detection circuit operatively associated with the midamble determination circuit. The UE can be configured for use with the low chip rate option of the Third Generation Partnership Project (3GPP) Universal Mobile Telecommunication System (UMTS) standards that employ a predefined set of downlink SYNC codes that point to midambles which indicate SYNC code modulation sequence to enables reading of data in a subsequent Broadcast Channel (BCH) message.

    Abstract translation: 用户设备(UE)接收和采样通信信号,其中通信信号具有时间帧格式,传输码片速率和与时隙相关联的同步码,所述时隙包括指示同步码的调制的中间码,其中指定 接收到的同步码的调制识别要接收数据的时隙的定时。 UE优选地包括与中间码确定电路可操作地相关联的同步码确定电路,中间码确定电路和相位调制序列检测电路。 UE可以被配置为与第三代合作伙伴计划(3GPP)通用移动电信系统(UMTS)标准的低码片速率选项一起使用,该标准采用指向下一个SYNC码的预定义的下行链路SYNC码组,其指示SYNC码调制序列到 使得能够在随后的广播信道(BCH)消息中读取数据。

    Processing Digital Samples in a Wireless Receiver
    375.
    发明申请
    Processing Digital Samples in a Wireless Receiver 有权
    在无线接收器中处理数字样本

    公开(公告)号:US20090110036A1

    公开(公告)日:2009-04-30

    申请号:US12016652

    申请日:2008-01-18

    CPC classification number: H04B1/707 H04B2201/7071 H04L25/0212 H04L25/03012

    Abstract: A method of processing digital samples of a signal received at a receiver of a wireless communication system includes monitoring channel conditions and generating a channel indicator including at least one channel parameter by performing at least one of: estimating a channel mobility parameter and comparing it with a threshold; estimating a channel parameter of the energy of the channel outside a predefined temporal window, and comparing it with a threshold; estimating a channel temporal duration parameter and establishing if it meets predetermined criteria; estimating a channel-zero location parameter and establishing if it meets predetermined criteria; estimating a received-signal signal-to-disturbance power ratio, and comparing it to a threshold; estimating an estimated-channel-response signal-to-disturbance power ratio; estimating the degree of non-stationarity of the disturbance at the receiver input; and selecting one of a plurality of processing routines for processing the digital samples based on said channel indicator. Related receivers are also described.

    Abstract translation: 一种处理在无线通信系统的接收机处接收的信号的数字样本的方法包括监视信道状况并通过执行以下中的至少一个来生成包括至少一个信道参数的信道指示符:估计信道移动性参数并将其与 阈; 估计在预定时间窗口之外的信道的能量的信道参数,并将其与阈值进行比较; 估计信道时间持续时间参数并确定它是否符合预定标准; 估计信道零位置参数并确定它是否符合预定标准; 估计接收信号信号与干扰功率比,并将其与阈值进行比较; 估计信道响应信号与干扰功率比; 估计接收机输入干扰的非平稳度; 以及基于所述信道指示符选择用于处理数字样本的多个处理例程之一。 还描述了相关接收机。

    CDMA RECEIVING APPARATUS
    377.
    发明申请
    CDMA RECEIVING APPARATUS 审中-公开
    CDMA接收设备

    公开(公告)号:US20090092175A1

    公开(公告)日:2009-04-09

    申请号:US12244896

    申请日:2008-10-03

    Applicant: SATOSHI OURA

    Inventor: SATOSHI OURA

    CPC classification number: H04B1/7117 H04B1/7113 H04B2201/7071

    Abstract: Disclosed is a CDMA receiver including a delay profile generating unit for generating a plurality of delay profiles in time slots; path detecting units for detecting paths from the plurality of delay profiles; delay spread calculating units for calculating delay spreads based upon the detected paths; a finger-number-allocation calculating unit for calculating a number of fingers to be allocated based upon number of detected paths and delay spreads; and finger allocating units for allocating fingers to the detected paths from the number of fingers to be allocated as calculated by the finger-number-allocation calculating unit.

    Abstract translation: 公开了一种CDMA接收机,包括用于在时隙中生成多个延迟分布的延迟分布生成单元; 路径检测单元,用于检测来自多个延迟分布的路径; 延迟扩展计算单元,用于基于检测到的路径计算延迟扩展; 手指号分配计算单元,用于基于检测到的路径数量和延迟扩展来计算要分配的手指数; 以及手指分配单元,用于从由手指号码分配计算单元计算出的要分配的手指数分配指针到检测到的路径。

    Correlation architecture for use in software-defined radio systems
    379.
    发明授权
    Correlation architecture for use in software-defined radio systems 有权
    用于软件定义无线电系统的相关架构

    公开(公告)号:US07483933B2

    公开(公告)日:2009-01-27

    申请号:US11150511

    申请日:2005-06-10

    Abstract: A re-configurable correlation unit for correlating a sequence of chip samples comprising: 1) a memory for storing the chip samples; 2) a plurality of add-subtract cells, each add-subtract cell receiving a plurality of real bits, a, and a plurality of imaginary bits, b, from a first chip sample; and 3) a plurality of sign select units. Each sign select units receives from one add-subtract cells a first input equal to a sum (a+b) of the real bits, a, and the imaginary bits, b, and a second input equal to a difference (a−b) of the real bits, a, and the imaginary bits, b. Each sign select unit generates a real output and an imaginary output, wherein each of the real and imaginary outputs is equal to one of: 1) the sum (a+b) multiplied by one of +1 and −1 and 2) the difference (a−b) multiplied by one of +1 and −1.

    Abstract translation: 一种可重新配置的相关单元,用于对芯片样本序列进行相关,包括:1)存储芯片样本的存储器; 2)多个加法单元,每个加法单元从第一芯片样本接收多个实际位a和多个虚数位b; 和3)多个符号选择单元。 每个符号选择单元从一个加减法单元接收等于实际比特a和b的和(a + b)的第一输入,以及虚数比特b和等于所述实数比特的差(ab)的第二输入 实际位,a和虚数位,b。 每个符号选择单元产生实际输出和虚拟输出,其中实际和虚拟输出中的每一个等于以下之一:1)乘以+1和-1之和的和(a + b)和2)差值 (ab)乘以+1和-1之一。

    CDMA RECEIVING APPARATUS AND CDMA RECEIVING METHOD
    380.
    发明申请
    CDMA RECEIVING APPARATUS AND CDMA RECEIVING METHOD 有权
    CDMA接收设备和CDMA接收方法

    公开(公告)号:US20090022212A1

    公开(公告)日:2009-01-22

    申请号:US12239974

    申请日:2008-09-29

    CPC classification number: H04B1/7117 H04B2201/7071

    Abstract: A CDMA receiving apparatus 1 comprises: a path searcher 20 which takes a received data sequence as an input, and which outputs path timing that corresponds to sample timing where a correlation value indicative of correlation between the received data sequence and a reference code sequence reaches a peak, and outputs the correlation value calculated at a sample timing adjacent to the path timing as an adjacent timing correlation value; an interpolation adjuster 40; and a despreader 30 which despreads an output of the interpolation adjuster 40 at the path timing, wherein the interpolation adjuster 40 includes an interpolator 60 for generating an interpolated received data sequence displaced in time by a specified fraction of one sample period with respect to the received data sequence, and outputs the received data sequence or the interpolated received data sequence by switching therebetween based on a result of a comparison between the correlation value calculated at the path timing and the adjacent timing correlation value.

    Abstract translation: CDMA接收装置1包括:路径搜索器20,其将接收到的数据序列作为输入,并且输出对应于采样定时的路径定时,其中指示接收的数据序列与参考代码序列之间的相关性的相关值达到 并将与在路径定时相邻的采样定时计算出的相关值作为相邻定时相关值输出; 内插调整器40; 以及解扩器30,其在路径定时对内插调整器40的输出进行解扩,其中插值调整器40包括内插器60,用于产生插值接收数据序列,该内插器60在时间上相对于接收到的一个采样周期的指定分数 数据序列,并且基于在路径定时计算的相关值与相邻定时相关值之间的比较的结果,通过切换接收数据序列或内插接收数据序列来输出。

Patent Agency Ranking