公开(公告)号：US20240339852A1

公开(公告)日：2024-10-10

申请号：US18359622

申请日：2023-07-26

Applicant: ASUSTEK COMPUTER INC.

Inventor： Tzu-Nan CHENG

IPC: H02J7/00

CPC classification number: H02J7/007182

Abstract: A power control method, applied to an electronic device. The electronic device may enter a non-running state and includes a connector and a battery module. The connector is suitable for connecting a charger. The power control method includes: obtaining, after confirming that the charger is connected to the connector, charging information of the charger; reading a battery voltage of the battery module; generating, after confirming that the electronic device enters the non-running state, an energy saving voltage according to the charging information and the battery voltage; and adjusting an output setting of the charger according to the energy saving voltage. A power control system is also provided.

公开(公告)号：US20240319777A1

公开(公告)日：2024-09-26

申请号：US18226437

申请日：2023-07-26

Applicant: ASUSTEK COMPUTER INC.

Inventor： Chih-Yao KUO ,  Ya-Han CHANG ,  Huang-Chieh HUANG

IPC: G06F1/3234 ,  G06F1/20 ,  G06F1/3206 ,  H05K7/20

CPC classification number: G06F1/3234 ,  G06F1/203 ,  G06F1/206 ,  G06F1/3206 ,  H05K7/20136 ,  H05K7/20209

Abstract: A heat dissipation control method applicable to a portable electronic device is provided. The portable electronic device is adapted to mount a heat dissipation back clip, and the heat dissipation back clip includes a cooling chip and a heat dissipation fan. The cooling chip has an adjustable cooling power consumption, and the heat dissipation fan has a heat removal wattage. The heat dissipation control method includes: detecting a real-time system power consumption of the portable electronic device; obtaining the cooling power consumption and the heat removal wattage; determining whether a sum of the real-time system power consumption and the cooling power consumption is greater than the heat removal wattage; and lowering the cooling power consumption if the sum is greater than the heat removal wattage. An electronic device and a portable electronic device to which the heat dissipation control method is applicable are further provided.

公开(公告)号：US20240297572A1

公开(公告)日：2024-09-05

申请号：US18513659

申请日：2023-11-20

Applicant: ASUSTeK COMPUTER INC.

Inventor： Min-Hou Kuo ,  Hsiang-Jui Hung ,  Sheng-Chieh Su ,  Hong-Shen Liu ,  Jia-Ching Huang ,  Bo-Siang Cheng ,  Yen-Yong Wu

IPC: H02M1/088 ,  H02M1/00

CPC classification number: H02M1/088 ,  H02M1/0025 ,  H02M1/0032

Abstract: A control circuit for controlling a power module is provided. The power module drives a processing circuit. The control circuit includes a first resistor, a second resistor, a trigger circuit, and a switch circuit. The first resistor is coupled between a first reference voltage and a setting input terminal. The second resistor is coupled between a second reference voltage and the setting input terminal. The trigger circuit provides a switching signal in response to an operating signal. The switch circuit transmits a control signal to the setting input terminal in response to a first voltage level, and stops transmitting the control signal in response to a second voltage level. The power module executes one of a first power supply mode and a second power supply mode in response to a voltage value. When the control signal is not received, the power module executes a third power supply mode.

公开(公告)号：US20240295606A1

公开(公告)日：2024-09-05

申请号：US18502097

申请日：2023-11-06

Applicant: ASUSTeK COMPUTER INC.

Inventor： Ke-Jen Hung ,  Yu-Cheng Shen

IPC: G01R31/367 ,  G01R31/3835

CPC classification number: G01R31/367 ,  G01R31/3835

Abstract: Disclosed are a method and a system for battery parameter update. The method is adapted to update a first battery parameter set of a target battery module, and includes: collecting a plurality of second battery parameter sets to a server when updating of a plurality of other battery modules are completed; classifying the second battery parameter sets based on a collection condition and storing them as reference battery parameter sets; determining whether the target battery module has not updated the first battery parameter set for more than a specified time; selecting a suitable battery parameter set close to a use state of the target battery module from the reference battery parameter sets when the target battery module does not update the first battery parameter set for more than the specified time; and updating the first battery parameter set of the target battery module according to the suitable battery parameter set.

公开(公告)号：US12073520B2

公开(公告)日：2024-08-27

申请号：US17959832

申请日：2022-10-04

Applicant: ASUSTEK COMPUTER INC.

Inventor： Kuo-Chung Chiu ,  Hsuan-Wu Wei ,  Yen-Ting Liu ,  Shang-Chih Liang ,  Shih-Hua Ma ,  Yi-Hsuan Tsai ,  Jun-Ting Chen ,  Kuan-Ling Chen

IPC: G06T19/00 ,  G06K7/14 ,  G06T7/60 ,  G06T19/20

CPC classification number: G06T19/006 ,  G06K7/1417 ,  G06T7/60 ,  G06T19/20

Abstract: An augmented reality implementing method applied to a server, which includes a plurality of augmented reality objects and a plurality of setting records corresponding to the augmented reality objects respectively is provided. Firstly, the server receives an augmented reality request from a mobile device, where the augmented reality request is related to a target device. Then, the server is communicated with the target device to access current information. Then, the server determines the current information corresponds to which one of the setting records, and selects one of the augmented reality objects based on the determined setting record as a virtual object provided to the mobile device.

公开(公告)号：US20240281586A1

公开(公告)日：2024-08-22

申请号：US18300334

申请日：2023-04-13

Applicant: ASUSTeK COMPUTER INC.

Inventor： Tai-Lang Chang

IPC: G06F30/392 ,  G06F30/347

CPC classification number: G06F30/392 ,  G06F30/347

Abstract: A circuit layout method and a circuit layout device. The method is adapted for a circuit layout of a common board circuit between a CPU, a GPU and a multimedia interface connector. The common board circuit includes a design circuit and a signal conditioner. The method includes the following steps: a common board evaluation is performed on multiple predetermined models according to a first layout design specification of the CPU and a second layout design specification of the GPU; the design circuit is planned according to a result of the common board evaluation; the suitable signal conditioner is selected according to the planned design circuit; and the first layout design specification, the second layout design specification and a third layout design specification of the signal conditioner are integrated, and accordingly a layout circuit diagram of the common board circuit is drawn.

公开(公告)号：US12069627B2

公开(公告)日：2024-08-20

申请号：US17545531

申请日：2021-12-08

Applicant: ASUSTek Computer Inc.

Inventor： Chun-Wei Huang ,  Li-Chih Tseng

IPC: H04L12/28 ,  H04L1/1812 ,  H04L5/00 ,  H04W72/0446 ,  H04W72/20 ,  H04W72/23

CPC classification number: H04W72/0446 ,  H04L1/1812 ,  H04L5/0007 ,  H04W72/20 ,  H04W72/23

Abstract: In an example, a User Equipment (UE) receives a message associated with Physical Downlink Shared Channel (PDSCH) parameter configuration. The message includes a first parameter indicating a first list of entries associated with time resource allocation for multiple PDSCHs, a second parameter indicating reception of multiple repetitions for a single PDSCH, and a third parameter indicating a second list of entries associated with time resource allocation. Each entry in the second list indicates a single time resource allocation. If the UE receives a Downlink Control Information (DCI) indicative of a first entry in the first list, the UE receives a plurality of PDSCHs based on a plurality of time resource allocations indicated by the first entry. A first repetition number for the plurality of PDSCHs is determined to be one. If the UE receives a DCI indicative of a second entry in the second list, the UE receives one or more PDSCHs with repetition based on a single time resource allocation indicated by the second entry. A second repetition number for the one or more PDSCHs is determined based on the second parameter.

公开(公告)号：US12066876B2

公开(公告)日：2024-08-20

申请号：US17571607

申请日：2022-01-10

Applicant: ASUSTeK COMPUTER INC.

Inventor： Kuo-Chin Hung ,  Ching-Yuan Yang

IPC: H05K7/20 ,  G06F1/20 ,  H05K5/02

CPC classification number: G06F1/203 ,  H05K5/0204 ,  H05K7/20136 ,  H05K7/20409 ,  H05K7/2049

Abstract: An electronic system includes an electronic device and a cooling device. The electronic device includes a housing, a heat source, a heat-conducting seat, and a heat-conducting block. The housing includes a space and at least one opening in communication with each other. The heat source and the heat-conducting seat are disposed in the space and contact with each. The heat-conducting seat faces the opening. The heat-conducting block is located at the opening and is connected to the housing. The cooling device includes a pressing portion and a cooling portion. The pressing portion presses the heat-conducting block, to cause the heat-conducting block to move into the space and abut against the heat-conducting seat, so that heat of the heat source is transferred to the pressing portion. The cooling portion is connected to the pressing portion, and dissipates the heat transferred to the pressing portion.

公开(公告)号：US12052662B2

公开(公告)日：2024-07-30

申请号：US17154236

申请日：2021-01-21

Applicant: ASUSTek Computer Inc.

Inventor： Yi-Hsuan Kung ,  Chun-Wei Huang ,  Ming-Che Li

IPC: H04W52/02 ,  H04W72/02 ,  H04W72/0446 ,  H04W72/1263 ,  H04W72/20 ,  H04W72/23 ,  H04W72/56 ,  H04W72/566 ,  H04W76/14 ,  H04W76/23 ,  H04W76/27 ,  H04W76/28 ,  H04W92/18

CPC classification number: H04W52/0216 ,  H04W72/02 ,  H04W72/0446 ,  H04W72/1263 ,  H04W72/20 ,  H04W72/23 ,  H04W72/566 ,  H04W72/569 ,  H04W76/14 ,  H04W76/27 ,  H04W76/28 ,  H04W92/18 ,  H04W72/56 ,  H04W76/23

Abstract: A method and apparatus are disclosed. In an example from the perspective of a first device, the first device performs sidelink communication with a first set of destinations, wherein one or more devices, associated with a destination of the first set of destinations, discontinuously monitor one or more sidelink control channels and/or one or more sidelink control informations (SCIs). The first device receives a sidelink grant from a network, wherein the sidelink grant is for performing a sidelink transmission at a first timing. The first device selects, from among a second set of destinations, a first destination for the sidelink transmission, wherein each destination of the second set of destinations is determined to have an active time for sidelink containing the first timing.

公开(公告)号：US12047951B2

公开(公告)日：2024-07-23

申请号：US17583901

申请日：2022-01-25

Applicant: ASUSTek Computer Inc.

Inventor： Hsin-Yuan Lo ,  Chun-Wei Huang

IPC: H04W72/1273 ,  H04L1/00 ,  H04W24/08 ,  H04W72/23

CPC classification number: H04W72/1273 ,  H04L1/0004 ,  H04W24/08 ,  H04W72/23

Abstract: A method and apparatus are disclosed from the perspective of a network. In one embodiment, the method includes the network transmitting a Semi-Persistent Scheduling (SPS) configuration to a User Equipment (UE) for configuring a second Physical Downlink Shared Channel (PDSCH). The method also includes the network transmitting a configuration to the UE for configuring a first monitoring occasion for a first Physical Downlink Control Channel (PDCCH) and a second monitoring occasion for a second PDCCH, wherein the second PDCCH is associated with the first PDCCH. The method further includes the network not allowing the first PDCCH and the second PDCCH to schedule the UE with a first PDSCH partially or fully overlapping with the second PDSCH in time domain, wherein a last symbol of a later monitoring occasion among the first and the second monitoring occasion ends less than a processing threshold before a starting symbol of the second PDSCH.