Abstract:
An electronic apparatus including a central processing unit (CPU), a chipset, a first interface circuit, a temporary memory, a BIOS (basic input/output system) memory, a second interface circuit and a first switcher is provided. The chipset is coupled to the CPU and the first switcher. The temporary memory is coupled to the first switcher and the first interface circuit. The first interface circuit is coupled to the electronic apparatus and an extended storage including a first BIOS. The second interface circuit is coupled to the first switcher and the BIOS memory. If the first BIOS is stored in the temporary memory, the temporary memory is coupled to the chipset by the first switcher; if the first BIOS is not stored in the temporary memory, the second interface circuit is coupled to the chipset by the first switcher. The electronic device can safely updates the BIOS.
Abstract:
A method for adaptively driving data transmission and a communication device using the same are provided. The proposed method includes following procedures. Detection result is generated after detecting a receiving signal on a receiving path of the communication device. Driving parameter is generated according to the detection result. Finally, a transmitting signal on a transmitting path is adjusted according to the driving parameter.
Abstract:
A reference current generation circuit is provided, in which a current generated according to a bandgap voltage is not directly used as a reference current, but the current generated according to the bandgap voltage is used to adjust an output reference current. In this way, the reference voltage is generated without using an external resistor, so as to effectively decrease the production cost.
Abstract:
An encryption and decryption device for a portable storage device and an encryption and decryption method thereof are provided. The encryption and decryption device includes a storage element, a control element and an encryption and decryption circuit. The control element receives a password, saves the password to the storage element and provides an encryption and decryption command. The encryption and decryption circuit is electrically connected to a portable storage device, receives the encryption and decryption command, reads the password stored in the storage element according to the encryption and decryption command, and encrypts or decrypts data stored in the portable storage device by utilizing the password according to whether the data have been encrypted. After the data are encrypted or decrypted, the encryption and decryption circuit clears the password in the storage element.
Abstract:
A clock generating device, method thereof and a computer system using the same are provided. The clock generating device includes a PLL module and a tuning module. The PLL module receives a reference clock signal, and generates an output clock signal as a basic clock of a computer system according to a phase difference between a reference clock signal and a feedback signal. The PLL module includes a frequency divider adjusting an intrinsic frequency dividing ratio according to a control signal and performs a frequency dividing processing on the output clock signal to generate a feedback signal. The tuning module coupled with the PLL module generates the control signal according to a VID of a CPU and one of the feedback signal and the reference clock. Therefore, the operation frequency of the components serving the output clock signal as the basic frequency in the computer system can be synchronously tuned.
Abstract:
A data accessing command integration method includes the following steps. Firstly, M data accessing commands are sequentially received through a bus, wherein N data accessing commands contained in the M data accessing commands have the same command type and comply with a sequential address relationship. Next, the N data accessing commands are re-ordered according to the addressing sequence, so that a first data corresponding to the re-ordered N data accessing commands are sequentially accessed in the data memory.
Abstract:
A color image enhancement apparatus has a color attribute interpreter and a color attribute adjuster. The color attribute interpreter generates an adjust signal according to a Hue, a Saturation and a Brightness of a pixel data. Of the adjust signal, each adjustment for each of the Hue, the Saturation and the Brightness is determined by all of the Hue, the Saturation and the Brightness of the pixel data. The color attribute adjuster is connected to the color attribute interpreter. The color attribute adjuster receives the adjust signal and adjusts the transformed color attribute according to the adjust signal.
Abstract:
Several display regions are defined on a display panel, and each display region has its panel characteristic data. A pixel data is received and the determined display region of the pixel data is determined. The pixel data is calibrated according to the panel characteristic data of the determined display region, and then the calibrated pixel data is transmitted to the display panel.
Abstract:
A testing circuit for testing a universal serial bus (USB) of an electronic device includes a controller, a first switch, a pull-down resistor, a gating pull-up resistor, and a second switch. The controller provides a control signal according to a power receiving condition of the electronic device. A control terminal of the first switch is coupled to the controller. The pull-down resistor is coupled between a configuration channel pin of the USB and a first terminal of the first switch. The gating pull-up resistor is coupled between the configuration channel pin and the control terminal of the first switch. A control terminal of the second switch is coupled to the controller. A first terminal of the second switch is coupled to a second terminal of the first switch and a ground pin of the USB. A second terminal of the second switch is coupled to a reference low voltage.
Abstract:
A testing circuit for testing a universal serial bus (USB) of an electronic device includes a controller, a first switch, a pull-down resistor, a gating pull-up resistor, and a second switch. The controller provides a control signal according to a power receiving condition of the electronic device. A control terminal of the first switch is coupled to the controller. The pull-down resistor is coupled between a configuration channel pin of the USB and a first terminal of the first switch. The gating pull-up resistor is coupled between the configuration channel pin and the control terminal of the first switch. A control terminal of the second switch is coupled to the controller. A first terminal of the second switch is coupled to a second terminal of the first switch and a ground pin of the USB. A second terminal of the second switch is coupled to a reference low voltage.