公开(公告)号：US20050173779A1

公开(公告)日：2005-08-11

申请号：US10504274

申请日：2003-02-11

Applicant: Luc Wuidart ,  Alexandre Malherbe ,  Michel Bardouillet

Inventor： Luc Wuidart ,  Alexandre Malherbe ,  Michel Bardouillet

IPC: H01L21/02 ,  H01L29/00

CPC classification number: H01L28/20

Abstract: The invention relates to a method and device for the irreversible reduction of the value of an integrated polycrystalline silicon resistor. The inventive method consists in temporarily subjecting the resistor to a stress current which is greater than a current (Im) for which the value of the resistor is maximum.

Abstract translation: 本发明涉及用于一体化多晶硅电阻器的值的不可逆降低的方法和装置。 本发明的方法在于使电阻器暂时受到大于电阻值最大的电流（Im）的应力电流。

公开(公告)号：US20050122759A1

公开(公告)日：2005-06-09

申请号：US10504273

申请日：2003-02-11

Applicant: Luc Wuidart ,  Michel Bardouillet ,  Alexandre Malherbe

Inventor： Luc Wuidart ,  Michel Bardouillet ,  Alexandre Malherbe

IPC: G11C16/22 ,  G11C17/14 ,  G11C17/00

CPC classification number: G11C17/14 ,  G11C16/22

Abstract: The invention relates to a one-time programmable memory cell and the programming method thereof. Thc invention comprises a programming transistor (MN) which is disposed in series with a polycrystalline silicon programming resistor (Rp) forming the memory element. According to the invention, the programming is non destructive with respect to the polycrystalline silicon resistor.

Abstract translation: 本发明涉及一次性可编程存储单元及其编程方法。 本发明包括与形成存储元件的多晶硅编程电阻器（Rp）串联布置的编程晶体管（MN）。 根据本发明，编程对于多晶硅电阻器是非破坏性的。

公开(公告)号：US06836430B2

公开(公告)日：2004-12-28

申请号：US10364848

申请日：2003-02-11

Applicant: Luc Wuidart ,  Michel Bardouillet ,  Alexandre Malherbe

Inventor： Luc Wuidart ,  Michel Bardouillet ,  Alexandre Malherbe

IPC: G11C1604

CPC classification number: G11C14/00 ,  H03K3/356008

Abstract: An extraction method and an integrated cell for extracting a binary value based on a propagation of an edge of a triggering signal in two electric paths, including across two voltage supply terminals: two parallel branches each including, in series, a resistor for differentiating the electric paths; a read transistor, the junction point of the resistor and of the read transistor of each branch defining an output terminal of the cell, and the gate of the read transistor of each branch being connected to the output terminal of the other branch; and a selection transistor.

Abstract translation: 一种提取方法和集成单元，用于基于两个电路中的触发信号的边缘的传播提取二进制值，包括两个电压源端：两个并联支路，每个并联支路分别包括用于区分电 路径 读取晶体管，每个分支的电阻器和读取晶体管的结点限定单元的输出端子，并且每个分支的读取晶体管的栅极连接到另一个分支的输出端子; 和选择晶体管。

公开(公告)号：US5686858A

公开(公告)日：1997-11-11

申请号：US521019

申请日：1995-08-30

Applicant: Alexandre Malherbe

Inventor： Alexandre Malherbe

IPC: G01K7/00 ,  G01K3/00 ,  G01K7/01 ,  H01L21/66 ,  H01L21/822 ,  H01L27/04 ,  H02H5/04 ,  H01L35/00

CPC classification number: G01K3/005 ,  G01K7/01 ,  H02H5/044

Abstract: An integrated circuit including a temperature threshold detector. This detector includes two MOS transistors with a same type of conductivity, circuitry for applying to the second transistor a gate-source voltage higher than the gate-source voltage of the first transistor by a value Vbe, VbE being the drop in voltage at the terminals of a forward-biased PN junction, and a comparator for comparing the currents flowing in the two transistors. The current in the second transistor diminishes faster than the current in the first transistor. If the dimensions of the transistors are accurately chosen, the curves pertaining to the diminishing of current (or curves deduced from these curves by homothetic transformation) intersect one another for a certain temperature. The detection of equality of the currents therefore enables a detection of the passage through this temperature.

Abstract translation: 包括温度阈值检测器的集成电路。 该检测器包括具有相同类型导电性的两个MOS晶体管，用于将高于第一晶体管的栅极 - 源极电压的栅极 - 源极电压施加到第二晶体管的电路，值为Vbe，VbE为端子处的电压降 的正向偏置PN结，以及用于比较在两个晶体管中流动的电流的比较器。 第二晶体管中的电流比第一晶体管中的电流减小。 如果准确地选择晶体管的尺寸，则与电流减小有关的曲线（或通过单相转换从这些曲线推导出的曲线）在一定温度下相交。 因此，电流相等的检测能够检测通过该温度的通道。