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37 条记录 (耗时 0.023 秒)

    Nor-type channel-program channel-erase contactless flash memory on SOI
    33.
    发明授权
    Nor-type channel-program channel-erase contactless flash memory on SOI 失效

    公开(公告)号：US07042044B2

    公开(公告)日：2006-05-09

    申请号：US10781112

    申请日：2004-02-18

    申请人： Koucheng Wu

    发明人： Koucheng Wu

    IPC分类号： H01L29/788

    CPC分类号： G11C16/3404 ,  G11C11/5628 ,  G11C16/0416 ,  G11C16/0491 ,  H01L21/84 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/1203 ,  H01L29/7881

    摘要： A semiconductor device having an electrically erasable programmable read only memory (EEPROM) comprises a contactless array of EEPROM memory cells disposed in rows and columns and constructed over a silicon-on-insulator wafer. Each EEPROM memory cell comprises a drain region, a source region, a gate region, and a body region. The semiconductor device further comprises a plurality of gate lines each connecting the gate regions of a row of EEPROM memory cells, a plurality of body lines each connecting the body regions of a column of EEPROM memory cells, a plurality of source lines each connecting the source regions of a column of EEPROM memory cells, and a plurality of drain lines each connecting the drain regions of a column of EEPROM memory cells. The source lines and the drain lines are buried lines, and the source regions and the drain regions of a column of EEPROM memory cells are insulated from the source regions and the drain regions of the adjacent columns of EEPROM memory cells.

    Capacitance measurement using an RLC circuit model
    36.
    发明授权
    Capacitance measurement using an RLC circuit model 失效
    使用RLC电路模型进行电容测量

    公开(公告)号：US5793640A

    公开(公告)日：1998-08-11

    申请号：US773171

    申请日：1996-12-26

    申请人： Koucheng Wu ,  Yu-Pin Han ,  Ying-Tsong Loh

    发明人： Koucheng Wu ,  Yu-Pin Han ,  Ying-Tsong Loh

    IPC分类号： G01R27/26 ,  G01R27/00

    CPC分类号： G01R27/2605

    摘要： A computer-aided method and system are provided for obtaining a measurement of the capacitance value of a device under test (DUT). The complex impedance of a device under test (DUT) is measured at two nearby frequencies using an RLC meter. The two complex impedance values are then stored in a computer readable medium. The DUT is modeled by a programmed computer as a four element RLC model circuit including a resistor and inductor in series with a parallel RC circuit having a single capacitor which represents the capacitance of the DUT. Four equations which describe the electrical characteristics of the four element RLC model circuit are stored in a computer readable medium. The four measured values of complex impedance are substituted by the computer into the four stored equations. Values are obtained for the four individual RLC circuit elements by solving the four equations. The four unknown values are obtained by use of an optimization routine and then stored to a computer readable medium. The value capacitor element representing the capacitance of the DUT is then displayed.

    摘要翻译： 提供了一种计算机辅助方法和系统，用于获得待测器件（DUT）的电容值的测量。 被测设备（DUT）的复阻抗使用RLC仪在两个附近的频率下测量。 然后将两个复阻抗值存储在计算机可读介质中。 DUT被编程的计算机建模为四元件RLC模型电路，其包括与表示DUT的电容的单个电容器的并联RC电路串联的电阻器和电感器。 描述四元素RLC模型电路的电特性的四个等式被存储在计算机可读介质中。 复阻抗的四个测量值被计算机代入四个存储的方程。 通过求解四个等式获得四个单独的RLC电路元件的值。 通过使用优化例程获得四个未知值，然后将其存储到计算机可读介质中。 然后显示表示DUT的电容的值电容器元件。