Abstract:
A motion detector system includes the ability to detect motion through the use of a Doppler radar sensor or a combination of PIR sensors and a Doppler radar sensor. The system includes an outdoor light fixture having one or more lamps and a housing coupled to the outdoor light fixture. The housing includes a Doppler radar sensor and a microprocessor for analyzing the signals received by the Doppler radar sensor. Alternatively, the housing includes a combination of PIR sensors and a Doppler radar sensor and a microprocessor for analyzing the signals received from these sensors. The lamps in the light fixture are activated when either the PIR sensor or the Doppler radar sensor generates a signal indicating motion within the monitored area. Alternatively, the lamps can be activated when either the PIR sensor or the Doppler radar sensor senses predetermined number of motion activities over a limited time period.
Abstract:
The present invention concerns a worklight that is easily and safety transportable. The worklight of the present invention includes a stand which defines an interior cavity. An extendable support or telescopic pole may be attached to the stand. The invention further includes at least one light fixture. The light fixture is sized to be stored within the cavity of the stand. The light fixture also includes a clamp. The clamp is adapted to releasably secure the fixture to the extendable support or telescopic pole. The stand further creates two points of contact with the support surface with the first point of contact being larger in size than the second point of contact.
Abstract:
A lighting system mountable to a support surface comprising a mounting bracket and a light housing having a lens attached thereto and a bulb located the lens. A photo control is also include which has a gradient of decreased opacity which controls the duration of operation of the light by adjustably limiting the amount of light sensed by the control. In addition, a shield located between the bulb and the lens may be provided. The shield is positionable about the bulb to selectively block light emitted by the bulb.The mounting bracket has a first support and a second support and the housing is adapted to releasably engage the supports in a sequential manner whereby when the first support is engaged, the housing is pivoted about the first support until the housing is in engagement with the second support. The housing then coacts with the second support so that it is secured to the mounting bracket in a fixed manner.
Abstract:
A computer system including a processor, a main memory and a cache memory uses tagging of various regions of memory to define and select caching properties of transfers between the processor and memory via the cache. The main memory contains not only standard random access memory (RAM) and read-only memory (ROM) but also memory-mapped input/output (I/O) sources. Tagging of the memory regions configures the regions for association with a particular set of caching properties. For example, a memory-mapped video I/O buffer may be tagged with a MM.sub.-- IO.sub.-- VBUF tag designating the caching properties of write-back cacheability with weak read/write ordering. Low-level operating system software, such as the Hardware Abstraction Language (HAL) interface of the Windows NT.TM. operating system or device driver software, initialize the memory regions, the cache and make symbolic associations between the memory regions and the cache. The cache, operating as directed by the memory tags, allows read and write operations that are used for performing various types of multimedia or signal processing operations including decompression, drawing operations, compression, mixing, and the like, which are performed on a virtually-cached multimedia drawing surface. The data for performing the multimedia or signal processing operations are either already located on the I/O surface or read from another storage location local to the processor or from an external processor, which is also cached and tagged as a special cached region. The processor executes operations acting on the cached data. When all operations are completely executed by the processor, only the cached memory regions are flushed using a flush instruction such as CFLSH�MM.sub.-- IO.sub.-- VBUF!. The flush instruction directs the cache to write back and invalidate the regions having the designated tag, here MM.sub.-- IO.sub.-- VBUF.