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公开(公告)号：US20220231717A1
公开(公告)日：2022-07-21
申请号：US17615051
申请日：2020-05-28
发明人： Daniel James RYAN
IPC分类号： H04B1/30
摘要： A radio system comprises a radio transmitter apparatus and a radio receiver apparatus. The radio transmitter apparatus is configured to transmit a continuous-wave radio-frequency signal having a first frequency. The radio receiver apparatus comprises: an antenna for receiving the continuous-wave radio-frequency signal; a local oscillator for generating a periodic signal at a second frequency which differs from the first frequency by a frequency offset; a mixer for mixing the received continuous-wave radio-frequency signal with the periodic signal to generate a down-mixed signal; and a processor or other circuitry configured to generate frequency-offset data from the down-mixed signal, wherein the frequency-offset data is representative of an estimate of the frequency offset. The processor or other circuitry is configured to use the frequency-offset data to generate DC-offset data representative of an estimate of a DC offset component of the down-mixed signal.
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公开(公告)号：US20220174484A1
公开(公告)日：2022-06-02
申请号：US17538839
申请日：2021-11-30
发明人： Carsten Wulff , Pål Håland
IPC分类号： H04W12/0471 , H04W8/00
摘要： A method of digital radio communication between a first device and a second device is disclosed. An advertising packet is transmitted between first and second devices, wherein the packet includes a first address and a data portion.
Additionally, an encryption key is transmitted between the devices. The first device generates a second address by encrypting an identity value derived from part of the first address using the encryption key and the data portion. The result is encrypted to generate second portion of the second address. The first device then transmits a connection request including the second address. The second device decrypts the second portion and uses the encryption key to determine correspondence with the first portion. If said correspondence is determined, the second device decrypts the first portion using at least the encryption key and compares it to an expected identity value derived from the first address.-
公开(公告)号：US20220115950A1
公开(公告)日：2022-04-14
申请号：US17500629
申请日：2021-10-13
发明人： Samuli HALLIKAINEN
摘要： A circuit portion comprises a DCDC converter that provides current from an output to a plurality of loads. Channel logic circuitry is configured to provide current from the output of the converter to each load according to a cyclical sequence, wherein each cycle has a duration that is divided equally into a plurality of time slots. The channel logic circuitry is configured to provide current to each load for one or more discrete time slots. The number of time slots is greater than the number of loads so that at least two output loads receive current for different numbers of time slots in a cycle.
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公开(公告)号：US11101833B2
公开(公告)日：2021-08-24
申请号：US16466623
申请日：2017-12-04
摘要： A radio receiver device is arranged to receive a radio signal including a data packet having an address portion and a payload portion, said radio receiver comprising: a first demodulation circuit portion arranged to demodulate the data packet and produce a first estimate of the address portion and a first estimate of the payload portion; a second demodulation circuit portion arranged to demodulate the data packet and produce a second estimate of the payload portion; a first comparison circuit portion arranged to compare said first and second estimates of the payload portion and produce a flag only if they are identical; and a second comparison circuit portion arranged, upon receipt of said flag, to compare said first estimate of the address portion to an expected address portion and to discard the data packet if they are not identical.
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公开(公告)号：US20210234735A1
公开(公告)日：2021-07-29
申请号：US16972192
申请日：2019-06-06
发明人： Jukka TAPANINEN
摘要： A radio receiver is provided for low-power detection of a radio signal, wherein said receiver is configured to receive a radio signal over a radio network; convert at least part of the received radio signal into a sequence of samples; compare the similarity of a first part of the sequence and a second part of the sequence, wherein the first part and the second part are of equal length; and in response to said similarity being greater than a similarity threshold: detect a phase difference between the first part of the sequence and the second part of the sequence; calculate a frequency offset between a frequency of the received radio signal and an expected frequency of the received radio signal using said phase difference; and use said calculated frequency offset to attempt full access to the radio network.
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公开(公告)号：US11011985B2
公开(公告)日：2021-05-18
申请号：US16333205
申请日：2017-09-13
摘要： A voltage reducing circuit comprises a power switch circuit portion comprising a high-side and low-side field-effect-transistors connected at a switch node. The power switch circuit portion has an on-state wherein the high-side transistor is enabled and the low-side transistor is disabled and, vice versa, an off-state. An energy storage circuit portion comprising an inductor connected to the switch node is arranged to provide an output voltage. A drive circuit portion receives a pulse width modulation control signal and outputs pulse width modulated (PWM) drive signals. A pre-biasing circuit portion applies bias voltages to the gate terminals of the high-side and low-side transistors in response to the PWM drive signals, wherein the pre-biasing circuit portion is arranged such that the bias voltage applied to the gate terminal of the currently disabled transistor is set to an intermediate voltage before switching between the on-state and off-state.
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公开(公告)号：US10979102B2
公开(公告)日：2021-04-13
申请号：US16465122
申请日：2017-11-29
摘要： An electronic device is arranged to receive near-field communication signals and comprises: first and second antenna connection terminals and a variable shunt resistance connected between the first and second antenna connection terminals. The device further comprises a peak detector arranged to detect an amplitude of an incoming near-field communication signal across the antenna connection terminals and to produce a peak signal (Vpd) dependent on the amplitude and a comparator arranged to produce an error signal, wherein the error signal is dependent on a difference between the peak signal and a reference signal (Vrefpeak). The device also comprises an integral controller which is arranged to vary the shunt resistance in response to an integral of the error signal. Said configuration is employed for regulating the received voltage and reducing voltage swing.
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公开(公告)号：US20210089491A1
公开(公告)日：2021-03-25
申请号：US16956105
申请日：2018-12-20
发明人： Ville MERIÖ
IPC分类号： G06F15/167 , G06F1/3206 , G06F9/38 , G06F9/54
摘要： An electronic device comprises a first processor and a second processor. An interprocessor communication module is connected to the processors and comprises a high priority mailbox and a low priority mailbox. The first processor sends a high or low priority message to the second processor. The first processor is arranged such that if it has a high priority message to send to the second processor, the first processor places the high priority message in the high priority mailbox and sends an interrupt request to the second processor. However, when the first processor has a low priority message to send to the second processor, the first processor places the high priority message in the low priority mailbox to be checked later without sending an interrupt request to the second processor.
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公开(公告)号：US20210055773A1
公开(公告)日：2021-02-25
申请号：US16982861
申请日：2019-03-22
IPC分类号： G06F1/3234 , G06K19/07 , H04L9/32 , H04W8/18
摘要： A method of controlling an electronic device including a memory and a removable smart card. The method involves the device sending a request for context data to the smart card. The smart card sends context data to the device in response to the request and stores this data in the memory and power to the smart card is reduced. Power to the smart card is then increased or restored, and the data is written back to the smart card.
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公开(公告)号：US20200348710A1
公开(公告)日：2020-11-05
申请号：US16864807
申请日：2020-05-01
发明人： Mikko LINTONEN , Jarmo VÄÄNÄNEN , Janne JUUSOLA
IPC分类号： G05F3/24 , G01R19/165
摘要： A voltage monitoring circuit portion is arranged to monitor a negative supply voltage (Vneg) and comprises a negative voltage generator arranged to generate the negative supply voltage (Vneg) and to output the negative supply voltage (Vneg) at an output terminal. A capacitor is arranged so that a first capacitor plate is connected to the output terminal of the generator and to a reference node via a potential divider. The potential divider is arranged to produce a monitor voltage (Vmonitor) between the resistors, where the reference node is supplied with a positive predetermined reference voltage (Vref). A comparator compares the monitor voltage (Vmonitor) to a threshold voltage (Vref_low) and to produce an output signal having a first value when the monitor voltage (Vmonitor) is below the threshold voltage (Vref_low) and having a second value otherwise. The negative voltage generator is enabled only when the output signal has its second value.
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