公开(公告)号：US20050008833A1

公开(公告)日：2005-01-13

申请号：US10854598

申请日：2004-05-26

Applicant: Brian Curcio ,  Frank Egitto ,  Robert Japp ,  Thomas Miller ,  Manh-Quan Nguyen ,  Douglas Powell

Inventor： Brian Curcio ,  Frank Egitto ,  Robert Japp ,  Thomas Miller ,  Manh-Quan Nguyen ,  Douglas Powell

IPC: H01L21/48 ,  H05K3/40 ,  H05K3/46 ,  B32B3/00

CPC classification number: H01L21/486 ,  H05K3/4069 ,  H05K3/4614 ,  H05K3/462 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2203/0191 ,  H05K2203/0264 ,  H05K2203/061 ,  H05K2203/1152 ,  Y10S438/976 ,  Y10T29/49165 ,  Y10T428/24917 ,  Y10T428/28 ,  Y10T428/2804 ,  Y10T428/2839 ,  Y10T428/2848

Abstract: A method for producing small pitch z-axis electrical interconnections in layers of dielectric materials which are applied to printed wiring boards and diverse electronic packages. A method for parallel fabrication of intermediate structures which are subsequently jointed to form a final structure. In addition there is provided a z-interconnected electrical structure, employing dielectric materials such as resin coated copper, employable in the manufacture of diverse type of electronic packages, including printed wiring boards (PWBs), substrates, multi-chip modules and the like.