公开(公告)号：US20080139158A1

公开(公告)日：2008-06-12

申请号：US11618835

申请日：2006-12-31

Applicant: Yuyu Chang ,  Arya Behzad

Inventor： Yuyu Chang ,  Arya Behzad

IPC: H04B1/16

CPC classification number: H04B1/18 ,  H03F3/19 ,  H03F3/45188 ,  H03F2200/294 ,  H03F2200/451 ,  H03F2200/534 ,  H03F2203/45318 ,  H03F2203/45386 ,  H03F2203/45544 ,  H03F2203/45638

Abstract: Aspects of a method and system for a transformer-based high performance cross-coupled low noise amplifier may include one or more circuits that integrate within a single chip, a balun with a low-noise amplifier. A DC current biasing path for the low-noise amplifier may be provided through the integrated balun. The low-noise amplifier may be configured as a cross-coupled low-noise amplifier, where the balun may be directly coupled to the cross-coupled low-noise amplifier. The balun may comprise two or more inductors, wherein one or more of the inductors may provide an electrical path for allowing a DC bias current to flow to ground. Integrating a balun on a single chip with a low-noise amplifier may allow the use of a single received signal input terminal. The biasing voltage may be selected to optimize performance of the low-noise amplifier.

Abstract translation: 用于基于变压器的高性能交叉耦合低噪声放大器的方法和系统的方面可以包括集成在单个芯片内的一个或多个电路，具有低噪声放大器的平衡 - 不平衡变压器。 可以通过集成的平衡 - 不平衡变压器提供用于低噪声放大器的直流电流偏置路径。 低噪声放大器可以被配置为交叉耦合低噪声放大器，其中平衡 - 不平衡变换器可以直接耦合到交叉耦合的低噪声放大器。 平衡 - 不平衡转换器可以包括两个或更多个电感器，其中一个或多个电感器可以提供用于允许DC偏置电流流向地的电路径。 将单芯片上的平衡 - 不平衡变换器与低噪声放大器集成可能允许使用单个接收信号输入端子。 可以选择偏置电压以优化低噪声放大器的性能。

公开(公告)号：US20080139119A1

公开(公告)日：2008-06-12

申请号：US11733047

申请日：2007-04-09

Applicant: Arya Behzad ,  Adedayo Ojo ,  Yuyu Chang ,  Hung-Ming Chien ,  Kishore Rama Rao ,  Guruprasad Seetharam

Inventor： Arya Behzad ,  Adedayo Ojo ,  Yuyu Chang ,  Hung-Ming Chien ,  Kishore Rama Rao ,  Guruprasad Seetharam

IPC: H04B7/00 ,  H04B1/26

CPC classification number: H04B1/06 ,  H04B1/0057 ,  H04B1/0082 ,  H04B7/084

Abstract: Aspects of a method and system for processing signals in a high performance receive chain may include amplifying radio frequency signals in amplifier chains in a multistandard radio frequency front-end, comprising one or more shared processing stages, and combining, with substantially equal gain, a number of phase-shifted radio frequency signals of the radio frequency signals into substantially equal-gain-combined radio frequency signals. The substantially equal-gain-combined radio frequency signals may be demodulated to obtain inphase channels and quadrature channels. A number of inphase channels and quadrature channels may be processed in I-channel processing blocks and Q-channel processing blocks to generate an output analog baseband signal. The multistandard radio frequency front-end may be capable of processing Bluetooth® signals and Wireless Local Area Network (WLAN) signals. The amplifier chains may comprise a first amplifier and a second amplifier, where the first amplifier may be shared between Bluetooth® signal processing paths and WLAN signal processing paths.

Abstract translation: 用于处理高性能接收链中的信号的方法和系统的方面可以包括在多标准射频前端放大放大器链中的射频信号，包括一个或多个共享处理级，并且以基本相等的增益组合 射频信号的相移射频信号的数量变成基本相等增益组合的射频信号。 基本上等增益组合的射频信号可以被解调以获得同相信道和正交信道。 可以在I信道处理块和Q信道处理块中处理多个同相信道和正交信道，以产生输出模拟基带信号。 多标准射频前端可能能够处理蓝牙信号和无线局域网（WLAN）信号。 放大器链可以包括第一放大器和第二放大器，其中第一放大器可以在蓝牙信号处理路径和WLAN信号处理路径之间共享。

公开(公告)号：US08385877B2

公开(公告)日：2013-02-26

申请号：US13033289

申请日：2011-02-23

Applicant: Yuyu Chang ,  Hooman Darabi

Inventor： Yuyu Chang ,  Hooman Darabi

IPC: H04B1/16 ,  H03F3/45

CPC classification number: H03F3/195 ,  H03F3/45188 ,  H03F2203/45316 ,  H03F2203/45384 ,  H03F2203/45392 ,  H03F2203/45481 ,  H03F2203/45638

Abstract: Fully integrated compact cross-coupled low noise amplifier. A circuitry implementation that includes two pairs of metal oxide semiconductor field-effect transistors (MOSFETs) (either N-type of P-type) operates as an LNA, which can be used within any of a wide variety of communication devices. A majority of the elements are integrated within the design and need not be implemented off-chip, and this can provide for a reduction in area required by the circuitry. A differential 100Ω input impedance is provided by this design. A higher than typical power supply voltage can be employed (if desired) to accommodate one possible implementation that includes two parallel implemented resistors to ground.

Abstract translation: 全集成紧凑型交叉耦合低噪声放大器。 包括两对金属氧化物半导体场效应晶体管（MOSFET）（N型P型）的电路实现作为LNA工作，可以在各种通信设备中使用。 大多数元件集成在设计中，不需要在片外实现，这可以减少电路所需的面积。 差分100＆OHgr; 输入阻抗由本设计提供。 可以采用高于典型的电源电压（如果需要）以适应包括两个并联实现的接地电阻的一种可能的实现。

公开(公告)号：US20120068780A1

公开(公告)日：2012-03-22

申请号：US12914235

申请日：2010-10-28

Applicant: Yuyu Chang ,  John Leete ,  Walid Ahmed ,  Wei Luo

Inventor： Yuyu Chang ,  John Leete ,  Walid Ahmed ,  Wei Luo

IPC: H03B5/02

CPC classification number: H03B5/02 ,  H03B5/04 ,  H03B5/32 ,  H03B5/368 ,  H03B2200/0034 ,  H03L1/00

Abstract: Methods and systems are provided to calibrate an oscillator circuit to reduce frequency pulling as a result of a change in power to a portion of the oscillator circuit. In an embodiment, an oscillator is coupled to a clock buffer circuit and a tuning capacitor configured to tune a frequency of the oscillator to a baseline frequency required for cellular communications. A change in power to the clock buffer circuit initiates a change in an amount of capacitance seen by the oscillator, which negatively impacts the tuning of the oscillator. A register stores a frequency offset caused by the change in power, and the tuning capacitor is adjusted, using the frequency offset, in response to the change in power, such that the total amount of capacitance seen by the oscillator is not changed when the change in power occurs.

Abstract translation: 提供了方法和系统来校准振荡器电路，以减少振荡器电路的一部分功率变化导致的频率拉动。 在一个实施例中，振荡器耦合到时钟缓冲器电路和调谐电容器，其被配置为将振荡器的频率调谐到蜂窝通信所需的基准频率。 时钟缓冲电路的功率变化启动振荡器看到的电容量的变化，这对振荡器的调谐产生负面影响。 寄存器存储由功率变化引起的频率偏移，并且使用频率偏移来调整调谐电容器以响应功率的变化，使得当变化时振荡器所看到的电容量总和没有改变 发生电力。

公开(公告)号：US08073417B2

公开(公告)日：2011-12-06

申请号：US11618835

申请日：2006-12-31

Applicant: Yuyu Chang ,  Arya Behzad

Inventor： Yuyu Chang ,  Arya Behzad

IPC: H04B1/18 ,  H04B1/28 ,  H04B7/00

CPC classification number: H04B1/18 ,  H03F3/19 ,  H03F3/45188 ,  H03F2200/294 ,  H03F2200/451 ,  H03F2200/534 ,  H03F2203/45318 ,  H03F2203/45386 ,  H03F2203/45544 ,  H03F2203/45638

Abstract: Aspects of a method and system for a transformer-based high performance cross-coupled low noise amplifier may include one or more circuits that integrate within a single chip, a balun with a low-noise amplifier. A DC current biasing path for the low-noise amplifier may be provided through the integrated balun. The low-noise amplifier may be configured as a cross-coupled low-noise amplifier, where the balun may be directly coupled to the cross-coupled low-noise amplifier. The balun may comprise two or more inductors, wherein one or more of the inductors may provide an electrical path for allowing a DC bias current to flow to ground. Integrating a balun on a single chip with a low-noise amplifier may allow the use of a single received signal input terminal. The biasing voltage may be selected to optimize performance of the low-noise amplifier.

Abstract translation: 用于基于变压器的高性能交叉耦合低噪声放大器的方法和系统的方面可以包括集成在单个芯片内的一个或多个电路，具有低噪声放大器的平衡 - 不平衡变压器。 可以通过集成的平衡 - 不平衡变压器提供用于低噪声放大器的直流电流偏置路径。 低噪声放大器可以被配置为交叉耦合低噪声放大器，其中平衡 - 不平衡变换器可以直接耦合到交叉耦合的低噪声放大器。 平衡 - 不平衡转换器可以包括两个或更多个电感器，其中一个或多个电感器可以提供用于允许DC偏置电流流向地的电路径。 将单芯片上的平衡 - 不平衡变换器与低噪声放大器集成可能允许使用单个接收信号输入端子。 可以选择偏置电压以优化低噪声放大器的性能。

公开(公告)号：US20110018604A1

公开(公告)日：2011-01-27

申请号：US12539495

申请日：2009-08-11

Applicant: Yuyu Chang ,  Qiang Li ,  John Leete ,  Hooman Darabi ,  Yiannis Kokolakis

Inventor： Yuyu Chang ,  Qiang Li ,  John Leete ,  Hooman Darabi ,  Yiannis Kokolakis

IPC: H03L5/00

CPC classification number: H03L1/00 ,  H03B5/368

Abstract: A method to provide a low-power clock signal or a low-noise clock signal is described herein. It is determined whether a low-power mode or a low-noise mode is in use. A voltage reference input of a low-dropout voltage regulator (LDO) is switched to a low-power voltage reference for low-power mode and to a low-noise voltage reference for low-noise mode. The LDO provides a constant voltage output to a crystal oscillator. A clock signal is generated using the crystal oscillator. The clock signal is limited using a low-power limiter to generate a low-power output clock signal and/or is limited using a low-noise limiter to generate a low-noise clock signal. The low-power output clock signal or the low-noise output clock signal is selected using a mux.

Abstract translation: 本文描述了提供低功率时钟信号或低噪声时钟信号的方法。 确定是否使用低功率模式或低噪声模式。 低压差稳压器（LDO）的参考电压输入端被切换到低功耗模式的低功耗参考电压，低噪声模式的低噪声电压基准用。 LDO为晶体振荡器提供恒定电压输出。 使用晶体振荡器产生时钟信号。 使用低功率限幅器来限制时钟信号以产生低功率输出时钟信号和/或使用低噪声限制器来限制以产生低噪声时钟信号。 使用多路复用器选择低功耗输出时钟信号或低噪声输出时钟信号。

公开(公告)号：US07782152B2

公开(公告)日：2010-08-24

申请号：US12241103

申请日：2008-09-30

Applicant: Hooman Darabi ,  Yuyu Chang ,  Zhimin Zhou ,  Morteza Vadipour

Inventor： Hooman Darabi ,  Yuyu Chang ,  Zhimin Zhou ,  Morteza Vadipour

IPC: H03B5/32

CPC classification number: H03L1/00 ,  H03B5/364 ,  H03B2201/0291 ,  H03J2200/10

Abstract: A frequency tuning device for use in a crystal oscillator circuit includes a first fine tuning array of capacitors, a second fine tuning array of capacitors and a coarse tuning array of capacitors coupled in parallel to produce a tuning capacitance for tuning the crystal oscillator. The first fine tuning array of capacitors includes a binary weighted switched capacitor network, the second fine tuning array of capacitors includes a thermometer coded switched capacitor network and the coarse tuning array of capacitors includes a binary weighted switched capacitor network with a different unit capacitance value than the first and second fine tuning arrays.

Abstract translation: 用于晶体振荡器电路的频率调谐装置包括电容器的第一微调阵列，电容器的第二微调阵列和并联耦合的电容器的粗调阵列，以产生用于调谐晶体振荡器的调谐电容。 电容器的第一微调阵列包括二进制加权开关电容器网络，第二微调阵列的电容器包括温度计编码的开关电容器网络，并且电容器的粗调阵列包括具有不同单位电容值的二进制加权开关电容器网络 第一和第二微调阵列。

公开(公告)号：US07768359B2

公开(公告)日：2010-08-03

申请号：US12241101

申请日：2008-09-30

Applicant: Yuyu Chang ,  Hooman Darabi

Inventor： Yuyu Chang ,  Hooman Darabi

IPC: H03B5/36

CPC classification number: H03B5/36 ,  H03B5/06 ,  H03B2200/0098

Abstract: A differential crystal oscillator circuit uses a bias transistor to generate a bias voltage from a bias current. The bias voltage is supplied to the control terminals of a differential pair of transistors. The differential transistors operate to produce a differential output between corresponding end terminals thereof, which is provided to a reference crystal oscillator to establish an oscillation frequency at the differential output.

Abstract translation: 差分晶体振荡器电路使用偏置晶体管从偏置电流产生偏置电压。 偏置电压被提供给差分晶体管对的控制端子。 差分晶体管的作用是在相应的端子之间产生差分输出，该差分输出被提供给参考晶体振荡器以在差分输出处建立振荡频率。

公开(公告)号：US20100026402A1

公开(公告)日：2010-02-04

申请号：US12241101

申请日：2008-09-30

Applicant: Yuyu Chang ,  Hooman Darabi

Inventor： Yuyu Chang ,  Hooman Darabi

IPC: H03B5/36

CPC classification number: H03B5/36 ,  H03B5/06 ,  H03B2200/0098

Abstract: A differential crystal oscillator circuit uses a bias transistor to generate a bias voltage from a bias current. The bias voltage is supplied to the control terminals of a differential pair of transistors. The differential transistors operate to produce a differential output between corresponding end terminals thereof, which is provided to a reference crystal oscillator to establish an oscillation frequency at the differential output.

公开(公告)号：US20090237165A1

公开(公告)日：2009-09-24

申请号：US12474021

申请日：2009-05-28

Applicant: Yuyu Chang ,  Hooman Darabi

Inventor： Yuyu Chang ,  Hooman Darabi

IPC: H03F3/16 ,  H03F3/45

CPC classification number: H03F3/45188 ,  H03F3/195 ,  H03F2200/294 ,  H03F2200/451 ,  H03F2203/45384 ,  H03F2203/45386 ,  H03F2203/45392 ,  H03F2203/45544 ,  H03F2203/45548 ,  H03F2203/45554 ,  H03F2203/45596 ,  H03F2203/45638 ,  H04B1/18

Abstract: Cross-coupled low noise amplifier for cellular applications. A circuitry implementation that includes two pairs of metal oxide semiconductor field-effect transistors (MOSFETs) (either N-type of P-type) operates as an LNA, which can be used within any of a wide variety of communication devices. In one embodiment, this design is particularly adaptable to cellular telephone applications. A majority of the elements are integrated within the design and need not be implemented off-chip, and this can provide for a reduction in area required by the circuitry. A very high output impedance is provided by using two transistors (implemented in a triple well configuration) with resistive source degeneration. A higher than typical power supply voltage can be employed (if desired) to accommodate the voltage drops of the resistors and transistors.

Abstract translation: 用于蜂窝应用的交叉耦合低噪声放大器。 包括两对金属氧化物半导体场效应晶体管（MOSFET）（N型P型）的电路实现作为LNA工作，可以在各种通信设备中使用。 在一个实施例中，该设计特别适用于蜂窝电话应用。 大多数元件集成在设计中，不需要在片外实现，这可以减少电路所需的面积。 通过使用具有电阻源退化的两个晶体管（以三阱配置实现）来提供非常高的输出阻抗。 可以使用高于典型的电源电压（如果需要）以适应电阻器和晶体管的电压降。