Controller and Method for Using a Transaction Flag for Page Protection
    31.
    发明申请
    Controller and Method for Using a Transaction Flag for Page Protection 有权
    控制器和使用事务标志进行页面保护的方法

    公开(公告)号:US20130173848A1

    公开(公告)日:2013-07-04

    申请号:US13341579

    申请日:2011-12-30

    Abstract: A controller is presented having one or more interfaces through which to communicate with a plurality of memory dies with multi-level memory cells and an interface through which to communicate with a host. The controller also contains a processor that is configured to receive a command from the host to program data in a plurality of lower pages and a plurality of upper pages of the multi-level memory cells. The controller detects an indication from the host that indicates which previously-programmed lower pages from a previous program command are at risk of being corrupted by the programming of the upper pages from the received program command. Prior to programming the upper pages, the controller backs up the previously-programmed lower pages from the previous program command that are at risk of being corrupted but not the lower pages of data programmed by the received program command.

    Abstract translation: 呈现具有一个或多个接口的控制器,通过该接口与具有多级存储器单元的多个存储器管芯通信,以及与主机通信的接口。 控制器还包括处理器,其被配置为从主机接收命令以对多级存储器单元的多个较低页面和多个上部页面中的数据进行编程。 控制器检测来自主机的指示,指示来自先前程序命令的哪些先前编程的下部页面有被接收到的程序命令的上位页编程损坏的危险。 在对页面进行编程之前,控制器将从先前编程的下一个程序命令备份,这些页面有被损坏的危险,而不是由接收的程序命令编程的数据的下一页。

    Optimized memory management for random and sequential data writing
    32.
    发明授权
    Optimized memory management for random and sequential data writing 有权
    优化的内存管理,用于随机和顺序数据写入

    公开(公告)号:US08452940B2

    公开(公告)日:2013-05-28

    申请号:US12346451

    申请日:2008-12-30

    Inventor: Alan W. Sinclair

    CPC classification number: G06F12/0246 G06F2212/7202

    Abstract: A method and system writes data to a memory device including writing data to varying types of physical write blocks. The method includes receiving a request to write data for a logical block address within an LBA range to the memory device. Depending on whether the quantity of valid data in the memory device meets a predetermined criteria, the data is written to a specific chaotic block, a general chaotic block, or a mapped block. The mapped block is assigned for writing data for the LBA range, the specific chaotic block is assigned for writing data for contiguous LBA ranges including the LBA range, and the general chaotic block is assigned for writing data for any LBA range. Lower fragmentation and write amplification ratios may result by using this method and system.

    Abstract translation: 一种方法和系统将数据写入存储器件,包括将数据写入不同类型的物理写入块。 该方法包括接收向LBA范围内的逻辑块地址写入数据到存储器件的请求。 根据存储装置中的有效数据的数量是否满足预定标准,数据被写入特定混沌块,一般混沌块或映射块。 分配映射的块用于写入LBA范围的数据,特定的混沌块被分配用于为包括LBA范围的连续LBA范围写入数据,并且分配一般混沌块用于为任何LBA范围写入数据。 通过使用该方法和系统可能导致较低的分段和写入放大率。

    Method and apparatus for providing data type and host file information to a mass storage system
    33.
    发明授权
    Method and apparatus for providing data type and host file information to a mass storage system 有权
    向大容量存储系统提供数据类型和主机文件信息的方法和装置

    公开(公告)号:US08239639B2

    公开(公告)日:2012-08-07

    申请号:US12030018

    申请日:2008-02-12

    Inventor: Alan W. Sinclair

    Abstract: A method and system for providing advance data type information to a mass storage system is disclosed. The method may include a host system providing host file information, such as a host file identifier and/or a data type, to a memory system in addition to LBA format data. The system may include a processor, a memory system interface and a host file system operative on the processor to identify and provide host file information and/or data type information to the memory system along with LBA format data.

    Abstract translation: 公开了一种用于向大容量存储系统提供高级数据类型信息的方法和系统。 除了LBA格式数据之外,该方法可以包括向存储器系统提供诸如主机文件标识符和/或数据类型的主机文件信息的主机系统。 系统可以包括在处理器上操作的处理器,存储器系统接口和主机文件系统,以便与LBA格式数据一起识别和提供主机文件信息和/或数据类型信息到存储器系统。

    OPTIMIZED MEMORY MANAGEMENT FOR RANDOM AND SEQUENTIAL DATA WRITING
    34.
    发明申请
    OPTIMIZED MEMORY MANAGEMENT FOR RANDOM AND SEQUENTIAL DATA WRITING 有权
    优化用于随机和顺序数据写入的内存管理

    公开(公告)号:US20100169588A1

    公开(公告)日:2010-07-01

    申请号:US12346451

    申请日:2008-12-30

    Inventor: Alan W. Sinclair

    CPC classification number: G06F12/0246 G06F2212/7202

    Abstract: A method and system writes data to a memory device including writing data to varying types of physical write blocks. The method includes receiving a request to write data for a logical block address within an LBA range to the memory device. Depending on whether the quantity of valid data in the memory device meets a predetermined criteria, the data is written to a specific chaotic block, a general chaotic block, or a mapped block. The mapped block is assigned for writing data for the LBA range, the specific chaotic block is assigned for writing data for contiguous LBA ranges including the LBA range, and the general chaotic block is assigned for writing data for any LBA range. Lower fragmentation and write amplification ratios may result by using this method and system.

    Abstract translation: 一种方法和系统将数据写入存储器件,包括将数据写入不同类型的物理写入块。 该方法包括接收向LBA范围内的逻辑块地址写入数据到存储器件的请求。 根据存储装置中的有效数据的数量是否满足预定标准,数据被写入特定混沌块,一般混沌块或映射块。 分配映射的块用于写入LBA范围的数据,特定的混沌块被分配用于为包括LBA范围的连续LBA范围写入数据,并且分配一般混沌块用于为任何LBA范围写入数据。 通过使用该方法和系统可能导致较低的分段和写入放大率。

    METHOD AND APPARATUS FOR RELOCATING SELECTED DATA BETWEEN FLASH PARTITIONS IN A MEMORY DEVICE
    35.
    发明申请
    METHOD AND APPARATUS FOR RELOCATING SELECTED DATA BETWEEN FLASH PARTITIONS IN A MEMORY DEVICE 审中-公开
    用于在存储器件中移动闪存分段之间的选择数据的方法和装置

    公开(公告)号:US20100169540A1

    公开(公告)日:2010-07-01

    申请号:US12345990

    申请日:2008-12-30

    Inventor: Alan W. Sinclair

    CPC classification number: G06F12/0246 G06F2212/7202 G11C2211/5641

    Abstract: A method and system for relocating selected groups of data in a storage device having a non-volatile memory consisting partitions with different types of non-volatile memory. The method may include determining whether data received a first partition meets one or more heightened read probability criteria and/or heightened delete probability criteria. If the criteria are not met, the received data is moved to a second partition, where the first partition has a higher endurance than the second partition. The system may include a first non-volatile memory partition and a second non-volatile memory partition having a lower endurance than the first, where a controller in communication with the first and second partitions determines if a heightened read probability and/or a heightened delete probability are present in received data.

    Abstract translation: 一种用于在具有由具有不同类型的非易失性存储器的分区组成的非易失性存储器的存储设备中重定位所选择的数据组的方法和系统。 该方法可以包括确定接收到的第一分区的数据是否符合一个或多个更高的读概率标准和/或提高的删除概率标准。 如果不满足标准,则将接收到的数据移动到第二分区,其中第一分区具有比第二分区更高的耐力。 该系统可以包括第一非易失性存储器分区和具有比第一非易失性存储器分区低的耐久性的第二非易失性存储器分区,其中与第一和第二分区通信的控制器确定是否增加读概率和/或高级删除 接收数据中存在概率。

    Controller and Method for Virtual LUN Assignment for Improved Memory Bank Mapping
    36.
    发明申请
    Controller and Method for Virtual LUN Assignment for Improved Memory Bank Mapping 有权
    用于虚拟LUN分配的控制器和方法,用于改进的存储体映射

    公开(公告)号:US20130159601A1

    公开(公告)日:2013-06-20

    申请号:US13330975

    申请日:2011-12-20

    Abstract: A controller communicates with a plurality of multi-chip memory packages. Each multi-chip memory package comprises a plurality of memory dies, each having a respective plurality of memory blocks, some of which are good and some of which are bad. The controller determines a number of good blocks in each memory die. Based on the determined number of good blocks in each memory die, the controller selects a memory die from each of the multi-chip memory packages to access in parallel, wherein the selected memory dies are not necessarily all in the same relative position in each multi-chip package. The controller then creates a metablock from a set of good blocks from each of the selected memory dies, wherein a maximum number of metablocks that can be created across the selected memory dies is determined by a lowest number of good blocks in the selected memory dies.

    Abstract translation: 控制器与多个多芯片存储器包进行通信。 每个多芯片存储器封装包括多个存储器管芯,每个存储器管芯具有相应的多个存储器块,其中一些存储器块是好的,其中一些是不好的。 控制器确定每个存储器管芯中的多个好的块。 基于每个存储器管芯中所确定的良好块的数量,控制器从每个多芯片存储器封装中选择并行访问的存储器管芯,其中所选择的存储器管芯不一定在每个多个存储器管芯中处于相同的相对位置 芯片封装 然后,控制器从来自所选择的存储器管芯的每一个的一组好的块创建元区块,其中可以通过所选择的存储器管芯中的最低数量的好块来确定跨所选择的存储器管芯可以创建的最大数量的元区块。

    Direct data file storage in flash memories
    37.
    发明授权
    Direct data file storage in flash memories 有权
    在闪存中直接存储数据文件

    公开(公告)号:US07877539B2

    公开(公告)日:2011-01-25

    申请号:US11060249

    申请日:2005-02-16

    CPC classification number: G06F12/0246 G06F2212/7201

    Abstract: Host system data files are written directly to a large erase block flash memory system with a unique identification of each file and offsets of data within the file but without the use of any intermediate logical addresses or a virtual address space for the memory. Directory information of where the files are stored in the memory is maintained within the memory system by its controller, rather than by the host. The file based interface between the host and memory systems allows the memory system controller to utilize the data storage blocks within the memory with increased efficiency.

    Abstract translation: 主机系统数据文件直接写入具有每个文件的唯一标识和文件内数据偏移的大型擦除块闪存系统,但不使用任何中间逻辑地址或存储器的虚拟地址空间。 文件存储在存储器中的目录信息由其控制器而不是由主机保存在存储器系统内。 主机和存储器系统之间的基于文件的接口允许存储器系统控制器以更高的效率利用存储器内的数据存储块。

    Dual mode access for non-volatile storage devices
    38.
    发明授权
    Dual mode access for non-volatile storage devices 有权
    非易失性存储设备的双模式访问

    公开(公告)号:US07793068B2

    公开(公告)日:2010-09-07

    申请号:US11314842

    申请日:2005-12-21

    CPC classification number: G06F3/0643 G06F3/0605 G06F3/0679

    Abstract: Method and mass storage memory system is provided. The system includes, re-programmable non-volatile memory cells, the memory cells being arranged in a plurality of blocks that are erasable together; and a controller including a microprocessor that is adapted to receive files of data identified by unique identifiers via a first interface and the controller causes a received data file to be stored in one or more memory blocks; and the controller receives data identified by logical addresses via a second interface and stores the received data in one or more memory blocks, wherein data written via the first interface is indexed using the unique identifiers so that data is accessible via the second interface or the first interface; and data received via the second interface is indexed so that data can be accessed via the first interface or the second interface.

    Abstract translation: 提供了方法和大容量存储存储系统。 该系统包括可重新编程的非易失性存储器单元,存储单元布置在可以一起可擦除的多个块中; 以及控制器,其包括适于经由第一接口接收由唯一标识符标识的数据的文件的微处理器,并且所述控制器使接收到的数据文件存储在一个或多个存储器块中; 并且控制器经由第二接口接收由逻辑地址识别的数据,并将接收到的数据存储在一个或多个存储器块中,其中经由第一接口写入的数据使用唯一标识符进行索引,使得经由第二接口或第一接口 接口; 并且通过第二接口接收的数据被索引,使得可以经由第一接口或第二接口访问数据。

    Direct File Data Programming and Deletion in Flash Memories
    39.
    发明申请
    Direct File Data Programming and Deletion in Flash Memories 有权
    Flash存储器中的直接文件数据编程和删除

    公开(公告)号:US20100223423A1

    公开(公告)日:2010-09-02

    申请号:US12775639

    申请日:2010-05-07

    Abstract: Host system data files are written directly to a large erase block flash memory system with a unique identification of each file and offsets of data within the file but without the use of any intermediate logical addresses or a virtual address space for the memory. Directory information of where the files are stored in the memory is maintained within the memory system by its controller, rather than by the host. The file based interface between the host and memory systems allows the memory system controller to utilize the data storage blocks within the memory with increased efficiency.

    Abstract translation: 主机系统数据文件直接写入具有每个文件的唯一标识和文件内数据偏移的大型擦除块闪存系统,但不使用任何中间逻辑地址或存储器的虚拟地址空间。 文件存储在存储器中的目录信息由其控制器而不是由主机保存在存储器系统内。 主机和存储器系统之间的基于文件的接口允许存储器系统控制器以更高的效率利用存储器内的数据存储块。

    Method and system for accessing non-volatile storage devices
    40.
    发明授权
    Method and system for accessing non-volatile storage devices 有权
    用于访问非易失性存储设备的方法和系统

    公开(公告)号:US07747837B2

    公开(公告)日:2010-06-29

    申请号:US11313567

    申请日:2005-12-21

    CPC classification number: G06F3/0638 G06F3/0607 G06F3/0679

    Abstract: A mass storage memory system is provided. The memory system includes, re-programmable non-volatile memory cells arranged in a plurality of blocks of memory cells; and a controller that is adapted to receive data via a first interface, and/or a second interface, and data received via the first interface and the second interface is accessible via the first interface and the second interface even if a file name for the data is not provided by a host system or before a write operation is complete. The first interface is a file based interface and the second interface is a logical interface.

    Abstract translation: 提供大容量存储存储器系统。 存储器系统包括布置在存储器单元的多个块中的可重新编程的非易失性存储器单元; 以及适于经由第一接口和/或第二接口接收数据的控制器,并且经由所述第一接口和所述第二接口接收的数据可经由所述第一接口和所述第二接口访问,即使所述数据的文件名 不是由主机系统提供或在写操作完成之前。 第一个接口是一个基于文件的接口,第二个接口是一个逻辑接口。

Patent Agency Ranking