公开(公告)号：US4020125A

公开(公告)日：1977-04-26

申请号：US288374

申请日：1972-09-12

申请人： Hisao Suzuki ,  Akira Musashi ,  Yoshiyuki Ando ,  Tomoyuki Inoue

发明人： Hisao Suzuki ,  Akira Musashi ,  Yoshiyuki Ando ,  Tomoyuki Inoue

IPC分类号： C08F8/00 ,  C08C19/30 ,  C08F8/30 ,  C08F279/02 ,  C08F290/00 ,  C08F299/00 ,  C08G18/00 ,  C08G18/62 ,  C08G18/69 ,  C08G18/81 ,  C09J121/00 ,  C08L75/00

CPC分类号： C08G18/6208 ,  C08C19/30 ,  C08F279/02 ,  C08G18/8158 ,  Y10S525/92 ,  Y10S525/94

摘要： A resin comprising: (1) mainly a polybutadiene chain which is prepared from polybutadiene having a molecular weight of 500 to 200,000 and more than 30% of 1,2-configuration by hydrogenizing polybutadiene to the extent that at least about 30% of double bonds are contained in the polybutadiene molecule; (2) and olefinic bond group in the tip of the molecule; and, (3) a functional group selected from the group consisting of urethane, carboimino and ureylene which combine the polybutadiene chain and the olefinic bond.

摘要翻译： 一种树脂，其包括：（1）主要是聚丁二烯链，其由具有500至200,000的分子量的聚丁二烯和通过氢化聚丁二烯而成为1,2-构型的30％的聚丁二烯制成，至少约30％的双键 包含在聚丁二烯分子中; （2）和分子末端的烯键基团; 和（3）选自组合聚丁二烯链和烯键的氨基甲酸酯，碳亚氨基和亚芳基的官能团。

公开(公告)号：US20140191065A1

公开(公告)日：2014-07-10

申请号：US14240208

申请日：2011-08-22

申请人： Hisao Suzuki

发明人： Hisao Suzuki

IPC分类号： F02M63/00

CPC分类号： F02M63/0033 ,  F02M61/1813 ,  F02M61/1833 ,  F02M61/1853

摘要： A fuel injection valve that can favorably reduce the film thickness of fuel ejected from an outlet of an injection hole without relying on increase of the fuel pressure, whereby atomization of fuel spray can be favorably promoted, is provided.A fuel passage (16) through which the fuel flows is formed in the interior of the fuel injection valve (10). An injection-hole plate (18) as a member that separates an injection space (20) into which the fuel is injected, from the fuel passage (16), is provided in which a plurality of injection holes (22) for ejecting the fuel from the fuel passage (16) toward the injection space (20) are formed. The injection-hole plate (18), as viewed from the outlet side of the injection hole (22), is formed with an injection-hole outlet-side groove (24) connected to the injection hole (22) in a region (inner wall surface 22b) opposed to a main flow direction of the fuel directed toward the injection hole (22) along an inner wall surface (18a) of the injection-hole plate (18). The injection-hole outlet-side groove (24) is formed so as to extend in a direction away from the injection hole (22).

摘要翻译： 一种燃料喷射阀，其可以有利地降低从喷射孔的出口喷射的燃料的膜厚度，而不依赖于燃料压力的增加，从而可以有利地促进燃料喷雾的雾化。 燃料流动的燃料通道（16）形成在燃料喷射阀（10）的内部。 作为将燃料喷射到其中的喷射空间（20）从燃料通路（16）分离的部件的喷射孔板（18）设置有多个用于喷射燃料的喷射孔（22） 从燃料通路（16）向喷射空间（20）形成。 从注射孔（22）的出口侧观察，喷射孔板（18）形成有喷射孔出口侧槽（24），该喷射孔出口侧槽（24）在区域（内部 壁面22b），其与沿着喷射孔板（18）的内壁面（18a）朝向喷射孔（22）的燃料的主流动方向相对。 注入孔出口侧槽（24）形成为在远离喷射孔（22）的方向上延伸。

公开(公告)号：US08310306B2

公开(公告)日：2012-11-13

申请号：US12796500

申请日：2010-06-08

申请人： Shogo Itoh ,  Hisao Suzuki

发明人： Shogo Itoh ,  Hisao Suzuki

IPC分类号： H03F3/45

CPC分类号： H03F3/45183 ,  H03F3/3022 ,  H03F3/45179 ,  H03F2203/45646 ,  H03F2203/45652

摘要： An operational amplifier includes a first amplifier to which an input signal is applied, and a second amplifier to which an output of the first amplifier is applied, wherein the second amplifier includes a first transistor including a gate to which the output of the first amplifier is applied, and a second transistor including a gate to which the output of the first amplifier is applied, and a drain coupled to a source of the first transistor.

摘要翻译： 运算放大器包括施加输入信号的第一放大器和施加第一放大器的输出的第二放大器，其中第二放大器包括第一晶体管，第一晶体管包括第一放大器的输出为第 以及包括施加了第一放大器的输出的栅极的第二晶体管和耦合到第一晶体管的源极的漏极。

公开(公告)号：US07399066B2

公开(公告)日：2008-07-15

申请号：US10928277

申请日：2004-08-30

申请人： Makoto Kubota ,  Motokazu Kobayashi ,  Shinji Eritate ,  Hisao Suzuki ,  Fumio Uchida ,  Chiemi Shimizu ,  Kenji Maeda

发明人： Makoto Kubota ,  Motokazu Kobayashi ,  Shinji Eritate ,  Hisao Suzuki ,  Fumio Uchida ,  Chiemi Shimizu ,  Kenji Maeda

IPC分类号： B41J2/045 ,  H01L41/00

CPC分类号： B41J2/14233 ,  B41J2/14298 ,  B41J2/161 ,  B41J2/1617 ,  B41J2/1629 ,  B41J2/1645 ,  H01L41/0477 ,  H01L41/0478 ,  H01L41/0805 ,  H01L41/0973 ,  H01L41/318

摘要： A piezoelectric element including a vibrating plate, a lower electrode, a piezoelectric film and an upper electrode laminated in this order, wherein the lower electrode, the upper electrode and the piezoelectric film are formed by a perovskite type oxide while the vibrating plate is formed by a metal oxide, and a junction interface is substantially absent between the vibrating plate and the lower electrode, between the lower electrode and the piezoelectric film and between the piezoelectric film and the upper electrode.

摘要翻译： 一种包括振动板，下电极，压电膜和上电极的压电元件，其顺序层叠，其中下电极，上电极和压电膜由钙钛矿型氧化物形成，而振动板由 金属氧化物和接合界面基本上不存在于振动板和下部电极之间，下部电极和压电膜之间以及压电膜和上部电极之间。

公开(公告)号：US07250883B2

公开(公告)日：2007-07-31

申请号：US11261486

申请日：2005-10-31

申请人： Hisao Suzuki

发明人： Hisao Suzuki

IPC分类号： H03M1/00

CPC分类号： H03M1/447

摘要： A compact and highly accurate A/D converter includes series-connected computation cells, the number of which is equal to the number for bits in an output signal. The first computation cell includes a first comparison unit for subtracting a reference current from a first input current to generate a first current, and a second comparison unit for subtracting a second input current from the reference current to generate a second current. The second computation cell includes first and second comparison units having the same configurations as those in the first computation cell. The computation cells of latter stages have the same configurations as the second computation cell. Current mirror circuits included in the first and second comparison units of each computation cell generate the first and second currents. Each computation cell outputs a current having an absolute value in accordance with one of the first and second currents.

摘要翻译： 紧凑且高精度的A / D转换器包括串联连接的计算单元，其数量等于输出信号中的位数。 第一计算单元包括用于从第一输入电流减去参考电流以产生第一电流的第一比较单元和用于从参考电流中减去第二输入电流以产生第二电流的第二比较单元。 第二计算单元包括具有与第一计算单元中相同配置的第一和第二比较单元。 后级的计算单元具​​有与第二计算单元相同的配置。 包括在每个计算单元的第一和第二比较单元中的电流镜电路产生第一和第二电流。 每个计算单元根据第一和第二电流之一输出具有绝对值的电流。

公开(公告)号：US07204401B2

公开(公告)日：2007-04-17

申请号：US10727502

申请日：2003-12-05

申请人： Hisao Suzuki ,  Syozo Horikawa ,  Hiroshi Okamoto ,  Takayuki Irikura ,  Hiroyuki Yoshinari

发明人： Hisao Suzuki ,  Syozo Horikawa ,  Hiroshi Okamoto ,  Takayuki Irikura ,  Hiroyuki Yoshinari

IPC分类号： B65H23/032 ,  B65H23/24

CPC分类号： A24C5/20 ,  B65H23/0204 ,  B65H23/032 ,  B65H2406/31

摘要： A web material feeding apparatus has a suction plate 24 provided near an outlet of a reservoir box 2. The suction plate 24 can be shifted in the direction across a feeding path for tip paper C, by operation of a motor 76. The feeding apparatus also has a sensor unit 96 provided at the upstream side of a receiving drum 12. The sensor unit 96 supplies a detection signal to a controller 120. When the controller 120 detects meandering of the tip paper C on the basis of the detection signal supplied from the sensor unit 96, the controller 120 actuates the motor 76 to shift the suction plate 24 to thereby correct the meandering of the tip paper C.

摘要翻译： 纸幅材料供给装置具有设置在储存箱2的出口附近的吸引板24。 吸盘24可以通过马达76的操作沿着尖端纸C的供给路径的方向移动。 馈送装置还具有设置在接收鼓12的上游侧的传感器单元96。 传感器单元96向控制器120提供检测信号。 当控制器120基于从传感器单元96提供的检测信号来检测尖端纸C的曲折时，控制器120致动马达76以移动吸板24，从而校正尖端纸C的曲折。

公开(公告)号：US07187024B2

公开(公告)日：2007-03-06

申请号：US10662472

申请日：2003-09-16

申请人： Motokazu Kobayashi ,  Makoto Kubota ,  Hisao Suzuki ,  Fumio Uchida ,  Chiemi Shimizu ,  Kenji Maeda

发明人： Motokazu Kobayashi ,  Makoto Kubota ,  Hisao Suzuki ,  Fumio Uchida ,  Chiemi Shimizu ,  Kenji Maeda

IPC分类号： H01L29/78

CPC分类号： H01L41/318 ,  B41J2/14233 ,  B41J2/161 ,  B41J2/1645 ,  H01L41/0477 ,  H01L41/0973 ,  H01L41/1876

摘要： In a piezoelectric element having a piezoelectric film sandwiched between a lower electrode and an upper electrode, the lower electrode and/or the upper electrode and the piezoelectric film comprise perovskite oxide and a contact interface between the lower electrode and/or the upper electrode and the piezoelectric film does not exist and a region where crystals of the lower electrode and/or the upper electrode and crystals of the piezoelectric film are mixed exists between the lower electrode and/or the upper electrode and the piezoelectric film.

摘要翻译： 在具有夹在下电极和上电极之间的压电薄膜的压电元件中，下电极和/或上电极和压电薄膜包括钙钛矿氧化物和下电极和/或上电极之间的接触界面 压电薄膜不存在，下电极和/或上电极与压电薄膜之间存在下电极和/或上电极晶体与压电薄膜晶体混合的区域。

公开(公告)号：US07109903B2

公开(公告)日：2006-09-19

申请号：US10999190

申请日：2004-11-30

申请人： Hisao Suzuki

发明人： Hisao Suzuki

IPC分类号： H03M1/66

CPC分类号： H03M1/76

摘要： Provided is a digital-analog converter circuit that enables, for example, securing an improved accurate analog signal voltage and preventing increase in the circuit size. A first node of each individual unit is connected to a middle node of a one-order higher unit than a unit having that first node. A second node of the each individual unit is connected to one of the first and second nodes provided in the one-order higher unit than the unit having that second node, the one being on the side connected to a resister section set to an impedance value 2Z. A hierarchical structure can be formed in which an opponent connection point of the second node is selected by a hierarchy switch section, whereby the each individual unit is parallel connected to the resister section provided in the one-order higher unit and set to the impedance value 2Z. In correspondence to an input first-order bit signal (D0), an analog signal voltage (AV) corresponding to an output code (1) of digital data is output from a lowest-order bit unit (LU). In this manner, the D-A conversion operation is performed.

摘要翻译： 提供了一种数模转换器电路，其能够例如确保改进的精确模拟信号电压并防止电路尺寸的增加。 每个单独单元的第一节点连接到比具有该第一节点的单元更高一个单位的中间节点。 每个单独单元的第二节点连接到设置在一阶更高单元中的第一节点和具有该第二节点的单元之一，其中一个连接到设置为阻抗值的电阻部分 2 Z.可以形成层次结构，其中第二节点的对方连接点由分层开关部分选择，由此每个单独的单元并联连接到设置在一阶更高单元中的电阻部分，并且被设置为 阻抗值2Z.对应于输入一级位信号（D 0），从数字数据的输出代码（1）对应的模拟信号电压（AV）从最低位位单元（LU ）。 以这种方式，执行D-A转换操作。

公开(公告)号：US06985095B2

公开(公告)日：2006-01-10

申请号：US10890412

申请日：2004-07-14

申请人： Hisao Suzuki ,  Shogo Itoh

发明人： Hisao Suzuki ,  Shogo Itoh

IPC分类号： H03M1/36 ,  G05F1/10

CPC分类号： H03M1/0604 ,  H03M1/002 ,  H03M1/36

摘要： It is intended to provide an A/D converter circuit with which, by using a clock signal, on the basis of an analog voltage inputted a predetermined time past, it is possible to select suitably comparators to be operated and comparators to be rested, and which has small consumed power. A parallel-type A/D-converter circuit 200 converts an analog voltage VIN to a digital value DOUT at intervals of a predetermined period by means of a clock signal CLK using chopper-type comparators 1–7. The comparators 1–7 can each be set by first and second setting signals CONT1A etc. to either of an operating state and a resting state. A comparator control circuit section 211 performs logical processing on the comparator outputs OUT1–OUT7 in the preceding conversion to generate the first and second setting signals CONT1A etc., and brings some of the comparators to the operating state and holds the remaining comparators in the resting state.

摘要翻译： 旨在提供一种A / D转换器电路，通过使用时钟信号，通过输入预定时间过去的模拟电压，可以选择要被操作的适当的比较器和待休止的比较器，以及 功耗小。 并行型A / D转换器电路200通过使用斩波型比较器1-7的时钟信号CLK将模拟电压VIN以预定周期的间隔转换为数字值DOUT。 比较器1-7可以通过第一和第二设置信号CONT 1A等设置为操作状态和静止状态中的任一个。 比较器控制电路部分211在前一转换中对比较器输出端OUT 1 -OUT 7执行逻辑处理，以产生第一和第二设置信号CONT 1A等，并使一些比较器保持在运行状态并保持其余的 比较者处于休息状态。

公开(公告)号：US20050280567A1

公开(公告)日：2005-12-22

申请号：US10999190

申请日：2004-11-30

申请人： Hisao Suzuki

发明人： Hisao Suzuki

IPC分类号： H03M1/66 ,  H03M1/76

CPC分类号： H03M1/76

摘要： Provided is a digital-analog converter circuit that enables, for example, securing an improved accurate analog signal voltage and preventing increase in the circuit size. A first node of each individual unit is connected to a middle node of a one-order higher unit than a unit having that first node. A second node of the each individual unit is connected to one of the first and second nodes provided in the one-order higher unit than the unit having that second node, the one being on the side connected to a resister section set to an impedance value 2Z. A hierarchical structure can be formed in which an opponent connection point of the second node is selected by a hierarchy switch section, whereby the each individual unit is parallel connected to the resister section provided in the one-order higher unit and set to the impedance value 2Z. In correspondence to an input first-order bit signal (D0), an analog signal voltage (AV) corresponding to an output code (1) of digital data is output from a lowest-order bit unit (LU). In this manner, the D-A conversion operation is performed.

摘要翻译： 提供了一种数模转换器电路，其能够例如确保改进的精确模拟信号电压并防止电路尺寸的增加。 每个单独单元的第一节点连接到比具有该第一节点的单元更高一个单位的中间节点。 每个单独单元的第二节点连接到设置在一阶更高单元中的第一节点和具有该第二节点的单元之一，其中一个连接到设置为阻抗值的电阻部分 2 Z.可以形成层次结构，其中第二节点的对方连接点由分层开关部分选择，由此每个单独的单元并联连接到设置在一阶更高单元中的电阻部分并且被设置为 阻抗值2Z.对应于输入一级位信号（D 0），从数字数据的输出代码（1）对应的模拟信号电压（AV）从最低位位单元（LU ）。 以这种方式，执行D-A转换操作。