Display module and manufacturing method therefor, and display device

    公开(公告)号:US11988931B2

    公开(公告)日:2024-05-21

    申请号:US17908426

    申请日:2021-09-02

    CPC classification number: G02F1/136295 G02F1/136209 G02F1/136222

    Abstract: A display module includes a display panel and a dimming panel stacked on the display panel. The display panel has a plurality of pixel regions. The dimming panel has a plurality of dimming regions, and in a direction perpendicular to the display panel, a dimming region covers at least one pixel region. The dimming panel includes a plurality of dimming electrodes and a plurality of signal lines. Each dimming electrode is located in a dimming region in the plurality of dimming regions, and any two adjacent dimming electrodes have a gap therebetween. Each dimming electrode directly electrically connected to at least one signal line. The at least one signal line is configured to transmit a control voltage signal to the dimming electrode electrically connected to the at least one signal line for controlling a transmittance of the dimming region where the dimming electrode is located.

    Array substrate and display device
    37.
    发明授权

    公开(公告)号:US11869898B2

    公开(公告)日:2024-01-09

    申请号:US17259200

    申请日:2020-04-01

    CPC classification number: H01L27/124 G02F1/136286 G02F1/1368

    Abstract: An array substrate and display device are provided. The array substrate includes a base substrate, and gate lines, data lines, compensation blocks and sub-pixels located on the base substrate. Two gate lines are arranged between two adjacent rows of sub-pixels. The data lines are provided with multiple first extensions and second extensions arranged alternately. The extending direction of the first extensions intersects with the extending direction of the second extensions. The gate lines and data lines define multiple first pixel areas and second pixel areas on the base substrate. Two sub-pixels are arranged in the first pixel area, and one sub-pixel is arranged in the second pixel area. The multiple first pixel areas are arranged in an array, the multiple second pixel areas are arranged in two columns, and multiple columns of the first pixel areas are located between the two columns of the second pixel areas.

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