公开(公告)号：US20120217586A1

公开(公告)日：2012-08-30

申请号：US13035533

申请日：2011-02-25

申请人： Chan-Hong CHERN ,  Fu-Lung HSUEH

发明人： Chan-Hong CHERN ,  Fu-Lung HSUEH

IPC分类号： H01L27/06 ,  H01L21/8234

CPC分类号： H01L27/0629 ,  H01L27/1207 ,  H01L28/20 ,  H01L29/42364 ,  H01L29/42372 ,  H01L29/4958 ,  H01L29/4966 ,  H01L29/4975

摘要： A method of forming an integrated circuit includes forming at least one transistor over a substrate. The at least one transistor includes a first gate dielectric structure disposed over a substrate. A work-function metallic layer is disposed over the first gate dielectric structure. A conductive layer is disposed over the work-function metallic layer. A source/drain (S/D) region is disposed adjacent to each sidewall of the first gate dielectric structure. At least one resistor structure is formed over the substrate. The at least one resistor structure includes a first doped semiconductor layer disposed over the substrate. The at least one resistor structure does not include any work-function metallic layer between the first doped semiconductor layer and the substrate.

摘要翻译： 形成集成电路的方法包括在衬底上形成至少一个晶体管。 所述至少一个晶体管包括设置在衬底上的第一栅极电介质结构。 工作功能金属层设置在第一栅极电介质结构上。 导电层设置在功函数金属层上。 源极/漏极（S / D）区域邻近第一栅极电介质结构的每个侧壁设置。 在衬底上形成至少一个电阻器结构。 所述至少一个电阻器结构包括设置在所述衬底上的第一掺杂半导体层。 至少一个电阻器结构不包括在第一掺杂半导体层和衬底之间的任何功函数金属层。

公开(公告)号：US20120032518A1

公开(公告)日：2012-02-09

申请号：US12851023

申请日：2010-08-05

申请人： Ming-Chieh HUANG ,  Chan-Hong CHERN ,  David Barry SCOTT

发明人： Ming-Chieh HUANG ,  Chan-Hong CHERN ,  David Barry SCOTT

IPC分类号： H02J1/10

CPC分类号： H02J7/35 ,  H02J1/10 ,  H02J7/0055 ,  H02J7/025 ,  H02J17/00 ,  H02J50/00 ,  H02J50/20 ,  H02J50/30 ,  H02J50/40 ,  Y10T307/702

摘要： An energy harvesting system includes a plurality of transducers. The transducers are configured to generate direct current (DC) voltages from a plurality of ambient energy sources. A sensor control circuit has a plurality of sensors configured to detect the DC signals from the plurality of transducers. A DC-to-DC converter is configured to supply an output voltage. A plurality of switches, each switch coupled between the DC-to-DC converter and a corresponding transducer of the plurality of transducers. The sensor control circuit enables one switch of the plurality of switches and disables the other switches of the plurality of switches based on a priority criterion.

摘要翻译： 能量收集系统包括多个换能器。 传感器被配置为从多个环境能量源产生直流（DC）电压。 传感器控制电路具有被配置为检测来自多个换能器的直流信号的多个传感器。 DC-DC转换器被配置为提供输出电压。 多个开关，每个开关耦合在DC-DC转换器和多个换能器中的相应换能器之间。 传感器控制电路使得多个开关中的一个开关能够基于优先级标准而禁用多个开关中的其它开关。

公开(公告)号：US20130120051A1

公开(公告)日：2013-05-16

申请号：US13737624

申请日：2013-01-09

申请人： Chiang PU ,  Ming-Chieh HUANG ,  Chan-Hong CHERN

发明人： Chiang PU ,  Ming-Chieh HUANG ,  Chan-Hong CHERN

IPC分类号： G05F1/10

CPC分类号： G05F1/10 ,  G11C7/22 ,  G11C7/222 ,  G11C11/406 ,  G11C11/40615 ,  G11C11/40626 ,  G11C2211/4065

摘要： A circuit includes a comparator, a first circuit, and a second circuit. The comparator includes a first input node, a second input node, and an output node. The first circuit is configured to generate a temperature-dependent reference current at the second input node of the comparator. The second circuit is coupled with the second input node of the comparator. The second circuit is configured to increase a voltage level at the second input node of the comparator in response to the temperature-dependent reference current when a signal at the output node of the comparator indicates a first comparison result, and decrease the voltage level at the second input node of the comparator when the signal at the output node of the comparator indicates a second comparison result.

摘要翻译： 电路包括比较器，第一电路和第二电路。 比较器包括第一输入节点，第二输入节点和输出节点。 第一电路被配置为在比较器的第二输入节点处产生与温度相关的参考电流。 第二电路与比较器的第二输入节点耦合。 第二电路被配置为当比较器的输出节点处的信号指示第一比较结果时，响应于温度相关的参考电流来增加比较器的第二输入节点处的电压电平，并且降低电压电平 当比较器的输出节点处的信号指示第二比较结果时，比较器的第二输入节点。

公开(公告)号：US20120026820A1

公开(公告)日：2012-02-02

申请号：US12844204

申请日：2010-07-27

申请人： Chiang PU ,  Ming-Chieh HUANG ,  Chan-Hong CHERN

发明人： Chiang PU ,  Ming-Chieh HUANG ,  Chan-Hong CHERN

IPC分类号： G11C7/00 ,  G05F1/10

CPC分类号： G05F1/10 ,  G11C7/22 ,  G11C7/222 ,  G11C11/406 ,  G11C11/40615 ,  G11C11/40626 ,  G11C2211/4065

摘要： An integrated circuit includes a capacitor. A switch is electrically coupled with the capacitor in a parallel fashion. A comparator includes a first input node, a second input node, and an output node. The second input node is electrically coupled with a first plate of the capacitor. The output node is electrically coupled with the switch. A transistor is electrically coupled with a second plate of the capacitor. A circuit is electrically coupled with a gate of the transistor. The circuit is configured to provide a bias voltage to the gate of the transistor so as to control a current that is supplied to charge the capacitor.

摘要翻译： 集成电路包括电容器。 开关以并联方式与电容器电耦合。 比较器包括第一输入节点，第二输入节点和输出节点。 第二输入节点与电容器的第一板电耦合。 输出节点与开关电耦合。 晶体管与电容器的第二板电耦合。 电路与晶体管的栅极电耦合。 电路被配置为向晶体管的栅极提供偏置电压，以便控制供给电容器充电的电流。

公开(公告)号：US20110267139A1

公开(公告)日：2011-11-03

申请号：US13177958

申请日：2011-07-07

申请人： Chiang PU ,  Ming-Chieh HUANG ,  Chan-Hong CHERN ,  Tien-Chun YANG

发明人： Chiang PU ,  Ming-Chieh HUANG ,  Chan-Hong CHERN ,  Tien-Chun YANG

IPC分类号： G05F1/10 ,  H03F3/45

CPC分类号： G01C19/5776

摘要： Some embodiments regard a circuit comprising: a high voltage transistor providing a resistance; an amplifier configured to receive a current and to convert the current to a first voltage that is used in a loop creating the current; and an automatic level control circuit that, based on an AC amplitude of the first voltage, adjusts a second voltage at a gate of the high voltage transistor and thereby adjusts the resistance and the first voltage; wherein the automatic level control circuit is configured to adjust the first voltage toward the first reference voltage if the first voltage differs from a first reference voltage.

公开(公告)号：US20140185401A1

公开(公告)日：2014-07-03

申请号：US13765513

申请日：2013-02-12

申请人： Tien-Chun YANG ,  Yue-Der CHIH ,  Chan-Hong CHERN ,  Tao Wen CHUNG

发明人： Tien-Chun YANG ,  Yue-Der CHIH ,  Chan-Hong CHERN ,  Tao Wen CHUNG

IPC分类号： G11C7/06

CPC分类号： G11C7/062 ,  G11C7/14 ,  G11C13/004 ,  G11C2207/063

摘要： A sensing circuit includes a sensing resistor, a reference resistor and a comparator. The comparator has a first input coupled to the sensing resistor, a second input coupled to the reference resistor, and an output. The first input is configured to be coupled to a data bit line associated with a memory cell to receive a sensing input voltage caused by a cell current of the memory cell flowing through the sensing resistor. The second input is configured to be coupled to a reference bit line associated with a reference cell to receive a sensing reference voltage caused by a reference current of the reference cell flowing through the reference resistor. The comparator is configured to generate, at the output, an output signal indicating a logic state of data stored in the memory cell based on a comparison between the sensing input voltage and the sensing reference voltage.

摘要翻译： 感测电路包括感测电阻器，参考电阻器和比较器。 比较器具有耦合到感测电阻器的第一输入端，耦合到参考电阻器的第二输入端和输出端。 第一输入被配置为耦合到与存储器单元相关联的数据位线，以接收由流过感测电阻器的存储单元的单元电流引起的感测输入电压。 第二输入被配置为耦合到与参考单元相关联的参考位线，以接收由参考电池流过参考电阻器的参考电流引起的感测参考电压。 比较器被配置为基于感测输入电压和感测参考电压之间的比较，在输出处产生指示存储在存储器单元中的数据的逻辑状态的输出信号。

公开(公告)号：US20100271246A1

公开(公告)日：2010-10-28

申请号：US12764532

申请日：2010-04-21

申请人： Chan-Hong CHERN ,  Steven SWEI

发明人： Chan-Hong CHERN ,  Steven SWEI

IPC分类号： H03M1/66

CPC分类号： G01K7/14 ,  G01K7/01 ,  G01K2219/00

摘要： Mechanisms for providing linear relationship between temperatures and digital codes are disclosed. In one method, at a particular temperature, a circuit in the sensor provides a temperature dependent reference voltage, and a compared voltage, to a comparator. The temperature dependent reference voltage depends on temperature in complement to absolute temperature or alternatively depends on temperature in proportion to absolute temperature. The compared voltage is generated corresponding to digital analog converter (DAC) codes as inputs. Another circuit varies the DAC codes until the temperature dependent reference voltage and the compared voltage are equal so that the dependent reference voltage corresponds to a DAC code. The various temperatures experienced by the temperature sensing circuit and the DAC codes are substantially linearly related

摘要翻译： 公开了提供温度和数字代码之间的线性关系的机制。 在一种方法中，在特定温度下，传感器中的电路向比较器提供与温度相关的参考电压和比较的电压。 温度依赖参考电压取决于温度与绝对温度的补充，或者取决于与绝对温度成比例的温度。 相应的数字模拟转换器（DAC）代码作为输入产生比较电压。 另一个电路改变DAC代码，直到与温度相关的参考电压和比较的电压相等，从而相关的参考电压对应于DAC代码。 温度感测电路和DAC代码经历的各种温度基本上是线性相关的

公开(公告)号：US20110298059A1

公开(公告)日：2011-12-08

申请号：US12795144

申请日：2010-06-07

申请人： Mei-Hui HUANG ,  Chan-Hong CHERN

发明人： Mei-Hui HUANG ,  Chan-Hong CHERN

IPC分类号： H01L27/088 ,  H01L21/336

CPC分类号： H01L27/088 ,  H01L21/823425 ,  H01L21/823437 ,  H01L27/0207 ,  H01L29/0619 ,  H01L29/0649 ,  H01L29/42372 ,  H01L29/66545

摘要： An integrated circuit includes at least one first gate electrode of at least one active transistor. At least one first dummy gate electrode is disposed adjacent to a first side edge of the at least one first gate electrode. At least one second dummy gate electrode is disposed adjacent to a second side edge of the at least one first gate electrode. The second side edge is opposite to the first side edge. At least one guard ring is disposed around the at least one first gate electrode, the at least one first dummy gate electrode, and the at least one second dummy gate electrode. An ion implantation layer of the at least one guard ring substantially touches at least one of the at least one first dummy gate electrode and the at least one second dummy gate electrode.

摘要翻译： 集成电路包括至少一个有源晶体管的第一栅电极。 至少一个第一虚拟栅电极设置成与所述至少一个第一栅电极的第一侧边缘相邻。 至少一个第二伪栅电极设置成与所述至少一个第一栅电极的第二侧边相邻。 第二侧边缘与第一侧边缘相对。 至少一个保护环布置在所述至少一个第一栅电极，所述至少一个第一虚拟栅极电极和所述至少一个第二虚拟栅电极周围。 所述至少一个保护环的离子注入层基本上接触所述至少一个第一伪栅极电极和所述至少一个第二虚设栅极电极中的至少一个。

公开(公告)号：US20100223585A1

公开(公告)日：2010-09-02

申请号：US12684819

申请日：2010-01-08

申请人： Chan-Hong CHERN

发明人： Chan-Hong CHERN

IPC分类号： G06F17/50

CPC分类号： G06F17/5068 ,  H01L27/0207 ,  H01L27/088 ,  H01L29/0692

摘要： A method of forming an integrated circuit structure on a chip includes extracting an active layer from a design of the integrated circuit structure, forming a guard band conforming to the shape of the active layer, the guard band surrounds the active layer, and the guard band is spaced from the active layer at a first spacing in the X-axis direction and at a second spacing in the Y-axis direction, removing any part of the guard band that violates design rules, removing convex corners of the guard band, and adding dummy diffusion patterns into the remaining space of the chip outside the guard band. The first and second spacing can be specified as the same spacings in a Spice model characterization of the integrated circuit structure. The dummy diffusion patterns with different granularities can be added so that the diffusion density is substantially uniform over the chip.

摘要翻译： 在芯片上形成集成电路结构的方法包括从集成电路结构的设计中提取有源层，形成符合有源层形状的保护带，保护带围绕有源层，保护带 与有源层以X轴方向的第一间隔和Y轴方向上的第二间隔与有源层间隔开，去除违反设计规则的保护带的任何部分，去除保护带的凸角，并添加 伪散射图案进入保护带外部芯片的剩余空间。 在集成电路结构的Spice模型表征中，第一和第二间隔可以被指定为相同的间距。 可以添加具有不同粒度的虚拟扩散图案，使得扩散密度在芯片上基本均匀。