公开(公告)号：US09257157B2

公开(公告)日：2016-02-09

申请号：US13297280

申请日：2011-11-16

申请人： Chien-Hua Chu

发明人： Chien-Hua Chu

IPC分类号： G06F12/02 ,  G11C7/04 ,  G11C11/406

CPC分类号： G11C7/04 ,  G06F12/0246 ,  G11C11/40615

摘要： A temperature management method suitable for a memory storage device having a rewritable non-volatile memory module and a memory controller used for controlling the rewritable non-volatile memory module are provided. The temperature management method includes detecting and determining whether the hot-spot temperature of the memory storage device is higher than a predetermined temperature; and when affirmative, making the memory controller execute a cooling process, so as to reduce the hot-spot temperature of the memory storage device. Accordingly, the problem of heat buildup of the (rewritable non-volatile) memory storage device can be mitigated, as well as the problems of data loss and device aging of the (rewritable non-volatile) memory storage device.

摘要翻译： 提供一种适用于具有可重写非易失性存储器模块和用于控制可重写非易失性存储器模块的存储器控​​制器的存储器存储装置的温度管理方法。 温度管理方法包括检测和确定存储器存储装置的热点温度是否高于预定温度; 并且当肯定时，使存储器控制器执行冷却处理，以便降低存储器存储装置的热点温度。 因此，可以减轻（可重写非易失性）存储器件的积聚问题，以及（可重写非易失性）存储器件的数据丢失和器件老化的问题。

公开(公告)号：US08921911B2

公开(公告)日：2014-12-30

申请号：US13609739

申请日：2012-09-11

申请人： Pin-Yuan Yu ,  Yi-Chun Shao ,  Chien-Hua Chu

发明人： Pin-Yuan Yu ,  Yi-Chun Shao ,  Chien-Hua Chu

IPC分类号： H01L27/108

CPC分类号： H01G4/005 ,  H01G4/33 ,  H01L28/92

摘要： A vertical semiconductor charge storage structure includes a substrate, at least one lower electrode, a dielectric layer and an upper electrode. The lower electrode includes a lower conductor, and a first side conductor and a second side conductor connected to the lower conductor. The first side conductor and the second side conductor are parallel to each other and form an included angle with the lower conductor. A height of the first side conductor from the substrate is greater than a height of the second side conductor from the substrate. The dielectric layer and the upper electrode are sequentially formed on surfaces of the substrate and the lower electrode. Accordingly, by forming the first side conductor and the second side conductor at different heights, an aperture ratio is increased to reduce difficulty in filling or deposition in subsequent processes to further enhance an overall yield rate.

摘要翻译： 垂直半导体电荷存储结构包括衬底，至少一个下电极，电介质层和上电极。 下电极包括下导体和连接到下导体的第一侧导体和第二侧导体。 第一侧导体和第二侧导体彼此平行并与下导体形成夹角。 第一侧导体与衬底的高度大于第二侧导体与衬底的高度。 电介质层和上电极依次形成在基板和下电极的表面上。 因此，通过以不同的高度形成第一侧导体和第二侧导体，增加开口率以减少后续处理中的填充或沉积的困难，以进一步提高总的屈服率。

公开(公告)号：US08606970B2

公开(公告)日：2013-12-10

申请号：US13534557

申请日：2012-06-27

申请人： Chien-Hua Chu ,  Hong-Lipp Ko

发明人： Chien-Hua Chu ,  Hong-Lipp Ko

IPC分类号： G06F3/00 ,  G06F1/00 ,  G06F1/32

CPC分类号： G06F3/0601 ,  G06F1/3203 ,  G06F1/3275 ,  G06F13/1684 ,  Y02D10/13 ,  Y02D10/14 ,  Y02D50/20

摘要： A data writing method for writing data from a host system into a plurality of memory dies of a rewritable non-volatile memory storage apparatus is provided. The data writing method includes determining whether the data transmission interface of the host system complies with a first interface standard or a second interface standard. The data writing method also includes using a general mode to write the data into the memory dies when the data transmission interface of the host system complies with the first interface standard and using a power saving mode to write the data into the memory dies when the data transmission interface of the host system complies with the second interface standard. Accordingly, the data writing method can effectively prevent the stability of the rewritable non-volatile memory storage apparatus from reducing due to insufficient power supplied by the data transmission interface.

公开(公告)号：US20130304964A1

公开(公告)日：2013-11-14

申请号：US13555206

申请日：2012-07-23

申请人： Chien-Hua Chu

发明人： Chien-Hua Chu

IPC分类号： G06F12/00

CPC分类号： G06F12/0246 ,  G06F12/0238 ,  G06F2212/7201

摘要： A data processing method for a re-writable non-volatile memory module is provided. The method includes receiving a write data stream associating to a logical access address of a logical programming unit; selecting a physical programming unit; and determining whether the write data stream associates with a kind of pattern. The method includes, if the write data stream associates with the kind of pattern, setting identification information corresponding to the logical access address as an identification value corresponding to the pattern, and storing the identification information corresponding to the logical access address into a predetermined area, wherein the write data stream is not programmed into the selected physical programming unit. The method further includes mapping the logical programming unit to the physical programming unit. Accordingly, the method can effectively shorten the time for writing data into the re-writable non-volatile memory module.

摘要翻译： 提供了一种用于可重写非易失性存储器模块的数据处理方法。 该方法包括接收与逻辑编程单元的逻辑访问地址相关联的写入数据流; 选择物理编程单元; 以及确定写入数据流是否与一种模式相关联。 该方法包括：如果写入数据流与图案的种类相关联，则将与逻辑访问地址相对应的识别信息设置为与该模式对应的识别值，并将对应于逻辑访问地址的识别信息存储到预定区域中， 其中写入数据流不被编程到所选择的物理编程单元中。 该方法还包括将逻辑编程单元映射到物理编程单元。 因此，该方法可以有效地缩短将数据写入可重写的非易失性存储器模块的时间。

公开(公告)号：US08392797B2

公开(公告)日：2013-03-05

申请号：US12358879

申请日：2009-01-23

申请人： Kuo-Yi Cheng ,  Li-Chun Liang ,  Chien-Hua Chu

发明人： Kuo-Yi Cheng ,  Li-Chun Liang ,  Chien-Hua Chu

IPC分类号： G11C29/00

CPC分类号： G06F11/1068 ,  G11C2029/0411

摘要： An error correcting controller for connecting an old host controller having an old error correcting function with a new flash memory which requires a new error correcting function is provided. When the old host controller needs to write data into the new flash memory, the error correcting controller generates a new error correcting code according to the new error correcting function for the data. Then, when the old host controller needs to read the data from the new flash memory, the error correcting controller performs an error correcting procedure according to the new error correcting code and transmits information to the old host controller according to the result of the error correcting procedure and the old error correcting function. Accordingly, it is possible to allow the old host controller to access the new flash memory without changing the architecture of the old host controller.

摘要翻译： 提供了一种用于将具有旧错误校正功能的旧主机控制器与需要新的纠错功能的新闪存相连接的纠错控制器。 当旧的主机控制器需要将数据写入新的闪速存储器时，纠错控制器根据数据的新的纠错功能生成新的纠错码。 然后，当旧的主机控制器需要从新的闪速存储器读取数据时，纠错控制器根据新的纠错码执行纠错过程，并根据纠错的结果向旧的主控制器发送信息 程序和旧的纠错功能。 因此，可以允许旧的主机控制器访问新的闪存，而不改变旧的主机控制器的架构。

公开(公告)号：US08296504B2

公开(公告)日：2012-10-23

申请号：US12480125

申请日：2009-06-08

申请人： Chien-Hua Chu ,  Chih-Kang Yeh

发明人： Chien-Hua Chu ,  Chih-Kang Yeh

IPC分类号： G06F12/00 ,  G06F12/08 ,  G06F12/02

CPC分类号： G06F12/0804 ,  G06F12/0246 ,  G06F2212/2022 ,  G06F2212/214 ,  G06F2212/7208

摘要： A data management method for a flash memory storage system having a cache memory is provided. The data management method includes writing data into a flash memory when a write command is executed, and determining currently a state of all the writing data which is temporarily stored in the cache memory. Wherein, if the state indicates that a time for writing all the writing data temporarily stored in the cache memory into a flash memory may exceed an upper limit processing time, a portion of the writing data temporarily stored in the cache memory is first written into the flash memory. Accordingly, the data management method may effectively avoid a delay caused by a flush command issued from the host for flushing the cache memory.

摘要翻译： 提供了一种具有高速缓冲存储器的闪存存储系统的数据管理方法。 数据管理方法包括在执行写入命令时将数据写入闪速存储器，并且确定当前存储在高速缓冲存储器中的所有写入数据的状态。 其中，如果状态指示将临时存储在高速缓冲存储器中的所有写入数据写入闪速存储器的时间可能超过上限处理时间，则暂时存储在高速缓冲存储器中的部分写入数据首先写入 闪存 因此，数据管理方法可以有效地避免由主机发出的用于刷新高速缓冲存储器的刷新命令引起的延迟。

公开(公告)号：US20120265905A1

公开(公告)日：2012-10-18

申请号：US13534557

申请日：2012-06-27

申请人： Chien-Hua Chu ,  Hong-Lipp Ko

发明人： Chien-Hua Chu ,  Hong-Lipp Ko

IPC分类号： G06F3/00

CPC分类号： G06F3/0601 ,  G06F1/3203 ,  G06F1/3275 ,  G06F13/1684 ,  Y02D10/13 ,  Y02D10/14 ,  Y02D50/20

摘要： A data writing method for writing data from a host system into a plurality of memory dies of a rewritable non-volatile memory storage apparatus is provided. The data writing method includes determining whether the data transmission interface of the host system complies with a first interface standard or a second interface standard. The data writing method also includes using a general mode to write the data into the memory dies when the data transmission interface of the host system complies with the first interface standard and using a power saving mode to write the data into the memory dies when the data transmission interface of the host system complies with the second interface standard. Accordingly, the data writing method can effectively prevent the stability of the rewritable non-volatile memory storage apparatus from reducing due to insufficient power supplied by the data transmission interface.

摘要翻译： 提供一种用于将数据从主机系统写入可重写非易失性存储装置的多个存储器管芯中的数据写入方法。 数据写入方法包括确定主机系统的数据传输接口是否符合第一接口标准或第二接口标准。 数据写入方法还包括当主机系统的数据传输接口符合第一接口标准并使用省电模式将数据写入存储器管芯时将数据写入存储器管芯，当数据 主机系统的传输接口符合第二接口标准。 因此，数据写入方法可以有效地防止可重写非易失性存储装置的稳定性由于数据传输接口所提供的功率不足而降低。

公开(公告)号：US20110302364A1

公开(公告)日：2011-12-08

申请号：US13215166

申请日：2011-08-22

申请人： Chih-Kang Yeh ,  Chien-Hua Chu ,  Jia-Yi Fu

发明人： Chih-Kang Yeh ,  Chien-Hua Chu ,  Jia-Yi Fu

IPC分类号： G06F12/00

CPC分类号： G06F12/0246 ,  G06F2212/1032 ,  G06F2212/7203 ,  G06F2212/7207

摘要： A data writing method for a non-volatile memory is provided, wherein the non-volatile memory includes a data area and a spare area. In the data writing method, a plurality of blocks in a substitution area of the non-volatile memory is respectively used for substituting a plurality of blocks in the data area, wherein data to be written into the blocks in the data area is written into the blocks in the substitution area, and the blocks in the substitution area are selected from the spare area of the non-volatile memory. A plurality of temporary blocks of the non-volatile memory is used as a temporary area of the blocks in the substitution area, wherein the temporary area is used for temporarily storing the data to be written into the blocks in the substitution area.

摘要翻译： 提供了一种用于非易失性存储器的数据写入方法，其中非易失性存储器包括数据区域和备用区域。 在数据写入方法中，分别使用非易失性存储器的替代区域中的多个块来代替数据区域中的多个块，其中写入数据区域中的块的数据被写入到 在替代区域中的块，并且替换区域中的块从非易失性存储器的备用区域中选择。 非易失性存储器的多个临时块被用作替换区域中的块的临时区域，其中临时区域用于临时存储要写入替换区域中的块的数据。

公开(公告)号：US08074148B2

公开(公告)日：2011-12-06

申请号：US12186711

申请日：2008-08-06

申请人： Chien-Hua Chu ,  Kuo-Yi Cheng ,  Chih-Kang Yeh

发明人： Chien-Hua Chu ,  Kuo-Yi Cheng ,  Chih-Kang Yeh

IPC分类号： G11C29/00

CPC分类号： G06F11/1068

摘要： A memory management method and a controller for a non-volatile memory storage device are provided. The memory management method and the controller are adapted for establishing a logical-to-physical mapping table of each block in a memory buffer of the controller by merely reading the data stored in a system management area within a start page of each block, so as to promote the management efficiency of the non-volatile memory storage device. In addition, the method and the controller of the present invention integrate all of or a part of the system management areas within the start page for efficiently managing and using the memory capacity of all the system management areas within the start page.

摘要翻译： 提供了一种用于非易失性存储器存储装置的存储器管理方法和控制器。 存储器管理方法和控制器适于通过仅读取存储在每个块的起始页面中的系统管理区域中的数据来建立控制器的存储器缓冲器中的每个块的逻辑到物理映射表，以便 提升非易失性存储设备的管理效率。 此外，本发明的方法和控制器将起始页面内的系统管理区域的全部或一部分整合起来，以有效地管理和使用起始页面内的所有系统管理区域的存储器容量。

公开(公告)号：US20110231732A1

公开(公告)日：2011-09-22

申请号：US12785729

申请日：2010-05-24

申请人： Chien-Hua Chu

发明人： Chien-Hua Chu

IPC分类号： H03M13/05 ,  G06F11/10

CPC分类号： G06F11/1048 ,  H03M13/05

摘要： An error correcting method for a memory chip is provided. The memory chip has a plurality of physical blocks, each of the physical blocks has a plurality of physical pages, and the physical pages belonging to the same physical block are individually written and simultaneously erased. The error correcting method includes sequentially writing a plurality of data into the physical pages of a first physical block and generating a parity information according to the data. The error correcting method further includes writing the parity information into one of the physical pages of the first physical block following the data and correcting the data in the first physical block according to the parity information. Accordingly, the parity information can be used for correcting error bits in the data when an error checking and correcting circuit can not correct the error bits. Thereby, the error correcting ability is enhanced.

摘要翻译： 提供了一种用于存储芯片的纠错方法。 存储器芯片具有多个物理块，每个物理块具有多个物理页，并且属于同一物理块的物理页被单独写入并同时擦除。 误差校正方法包括：将多个数据顺序地写入第一物理块的物理页面，并根据该数据生成奇偶校验信息。 错误校正方法还包括将奇偶校验信息写入数据之后的第一物理块的物理页之一，并根据奇偶校验信息对第一物理块中的数据进行校正。 因此，当错误检查和校正电路不能校正错误位时，奇偶信息可以用于校正数据中的错误位。 由此，提高了纠错能力。