公开(公告)号：US08392901B2

公开(公告)日：2013-03-05

申请号：US11262200

申请日：2005-10-28

申请人： Darren J. Cepulis ,  Andrew Brown

发明人： Darren J. Cepulis ,  Andrew Brown

IPC分类号： G06F9/44 ,  G06F12/00

CPC分类号： G06F8/60

摘要： In at least some embodiments, a method comprises receiving a first command from a source external to a computer to provide a copy of a read only memory (ROM) image from the computer to the external source. The method also comprises receiving a second command from the source external to the computer to replace the computer's ROM image and, without re-booting the computer, replacing the computer's ROM image with a ROM image received from the external source.

摘要翻译： 在至少一些实施例中，一种方法包括从计算机外部的源接收第一命令以从计算机向外部源提供只读存储器（ROM）映像的副本。 该方法还包括从计算机外部的源接收第二命令以替换计算机的ROM映像，并且在不重新启动计算机的情况下，用从外部源接收的ROM映像替换计算机的ROM映像。

公开(公告)号：US07822961B2

公开(公告)日：2010-10-26

申请号：US11931652

申请日：2007-10-31

申请人： Darren J. Cepulis ,  Steven R. Dupree ,  Curtis R. Jones

发明人： Darren J. Cepulis ,  Steven R. Dupree ,  Curtis R. Jones

IPC分类号： G06F9/24

CPC分类号： G06F9/4411 ,  G06F9/4406

摘要： The invention is a method and related structure for providing operating system drivers during installation of the operating system, where those operating system drivers are provided by way of a virtual disk drive. Basic input/output system (BIOS) routines are adapted to support showing these operating system drivers as residing on a virtual disk drive within the system. The operating system drivers are stored in the unreserved ROM space of the computer. Further, multiple floppy images are stored in the ROM, and the BIOS is adapted to show only the floppy image appropriate for the operating system to be installed. The virtual drive contents may be those operating system drivers stored in the unreserved ROM, but also may be physically stored in RAM.

摘要翻译： 本发明是用于在安装操作系统期间提供操作系统驱动程序的方法和相关结构，其中那些操作系统驱动程序通过虚拟磁盘驱动器提供。 基本输入/输出系统（BIOS）程序适用于支持将这些操作系统驱动程序显示为驻留在系统内的虚拟磁盘驱动器上。 操作系统驱动程序存储在计算机的未预留的ROM空间中。 此外，多个软盘图像存储在ROM中，并且BIOS适于仅显示适合于要安装的操作系统的软盘映像。 虚拟驱动器内容可以是存储在未预留ROM中的那些操作系统驱动器，但也可以物理地存储在RAM中。

公开(公告)号：US07694159B2

公开(公告)日：2010-04-06

申请号：US11493046

申请日：2006-07-26

申请人： Darren J. Cepulis

发明人： Darren J. Cepulis

IPC分类号： G06F1/32

CPC分类号： G06F1/3203 ,  G06F1/26 ,  H04L12/10

摘要： An embodiment of a method for remotely controlling power consumption of at least one server, including providing remote control to an administrator over a power state of at least one server, building an instruction command and encoding it into a suitable format for transport over a data network from an administration terminal to the at least one server, and interpreting the command and executing the command by the at least one server without powering down the at least one server.

摘要翻译： 一种用于远程控制至少一个服务器的功率消耗的方法的实施例，包括通过至少一个服务器的功率状态向管理员提供远程控制，构建指令命令并将其编码成用于通过数据网络传输的合适格式 从管理终端到所述至少一个服务器，并解释所述命令并由所述至少一个服务器执行所述命令，而不断电所述至少一个服务器。

公开(公告)号：US07383429B2

公开(公告)日：2008-06-03

申请号：US10739540

申请日：2003-12-18

申请人： Darren J. Cepulis

发明人： Darren J. Cepulis

IPC分类号： G06F9/00 ,  G06F9/24 ,  G06F15/177

CPC分类号： G06F9/4416

摘要： During a power-on sequence of a computer system, it is detected whether the computer system is connected over a first type of connection to a terminal. In response to detecting that the computer system is connected over the first type of connection to the terminal, settings of the computer system are configured to be compatible with a first type of operating system.

摘要翻译： 在计算机系统的上电序列期间，检测计算机系统是否通过第一类型的连接连接到终端。 响应于检测到计算机系统通过第一类型的连接连接到终端，计算机系统的设置被配置为与第一类型的操作系统兼容。

公开(公告)号：US20080091962A1

公开(公告)日：2008-04-17

申请号：US11546096

申请日：2006-10-11

申请人： Darren J. Cepulis ,  Vincent Nguyen

发明人： Darren J. Cepulis ,  Vincent Nguyen

IPC分类号： G06F1/32

CPC分类号： G06F1/3203 ,  G06F1/3275 ,  Y02D10/13 ,  Y02D10/14

摘要： Embodiments of a system and method for controlling power consumption in a computing device having at least one CPU and memory. Embodiments reduce or increase the amount of memory available to the at least one CPU in response to changes in power consumption and/or changes in temperature. In some embodiments the amount of memory accessible to the CPU is decreased or increased, in other embodiments the power setting applied to portions of memory is decreased or increased.

摘要翻译： 用于控制具有至少一个CPU和存储器的计算设备中的功率消耗的系统和方法的实施例。 实施例响应于功率消耗和/或温度变化而减少或增加至少一个CPU可用的存储器的量。 在一些实施例中，CPU可访问的存储器的量减少或增加，在其它实施例中，施加到存储器的部分的功率设置被减小或增加。

公开(公告)号：US07085828B2

公开(公告)日：2006-08-01

申请号：US10014943

申请日：2001-10-26

申请人： Darren J. Cepulis

发明人： Darren J. Cepulis

IPC分类号： G06F15/173 ,  G06F15/177

CPC分类号： H04L67/306 ,  H04L29/06 ,  H04L67/34

摘要： A separate device or subsystem which contains its own processor is coupled to a host computer system and operates using specific information stored in the host system. The separate device, which may be management logic, requests the host system-specific information from the host system prior to run-time (e.g., during POST). The requested information is generally information in the form of industry standard tables that are present in the host system and used by the operating system. In addition, the separate device may have a battery to keep it operational even when the host system is non-operational. Because the separate device has information about its host, such information can be provided to external devices even when the host system is non-operational.

公开(公告)号：US06832372B1

公开(公告)日：2004-12-14

申请号：US09675529

申请日：2000-09-29

申请人： James F. Frye ,  Darren J. Cepulis

发明人： James F. Frye ,  Darren J. Cepulis

IPC分类号： G06F9445

CPC分类号： G06F9/24 ,  G06F9/4411

摘要： A computer system having central processing unit, a ROM, and an NVRAM. A table is stored in the ROM. The information relates to configuration data for boards installed in the computer. Each entry in the ROM table includes a board identifier and corresponding text describing the board and/or board configuration data. An extension table is stored in the NVRAM which provides storage capacity for the same type of information in the ROM-based table. The NVRAM-based extension table also includes storage for board identifiers and corresponding configuration information. A utility checks the ROM-based board table to determine whether a matching entry is found for each board in the system. If a match is found, the corresponding configuration information is used to configure the system for the board. If no match is found, the program checks the extension table for a matching entry and uses a default setting.

摘要翻译： 具有中央处理单元，ROM和NVRAM的计算机系统。 一个表存储在ROM中。 该信息涉及安装在计算机中的电路板的配置数据。 ROM表中的每个条目包括板标识符和描述板和/或板配置数据的相应文本。 扩展表存储在NVRAM中，为基于ROM的表中的相同类型的信息提供存储容量。 基于NVRAM的扩展表还包括板标识符和相应配置信息的存储。 一个实用程序检查基于ROM的板表，以确定是否为系统中的每个板找到匹配的条目。 如果发现匹配，则使用相应的配置信息为该板配置系统。 如果找不到匹配项，程序将检查扩展表中是否有匹配项，并使用默认设置。

公开(公告)号：US6061754A

公开(公告)日：2000-05-09

申请号：US882615

申请日：1997-06-25

申请人： Darren J. Cepulis ,  Siamak Tavallaei ,  Alexander C. Ekrot

发明人： Darren J. Cepulis ,  Siamak Tavallaei ,  Alexander C. Ekrot

IPC分类号： G06F13/40 ,  G06F13/00

CPC分类号： G06F13/4022

摘要： A data bus structure is disclosed. The structure includes a data bus having a bus agent connection point and a bus switch to selectively connect or disconnect the connection point to or from the data bus. A method of reconfiguring a data bus structure is also disclosed. The method includes providing two bus agent connection points on a data bus and a bus switch between the bus agent connection points and selecting the number of bus agent connection points on the bus by controlling the state of the bus switch.

摘要翻译： 公开了一种数据总线结构。 该结构包括具有总线代理连接点的数据总线和用于选择性地连接或断开与数据总线的连接点的总线开关。 还公开了一种重新配置数据总线结构的方法。 该方法包括在数据总线上提供两个总线代理连接点以及总线代理连接点之间的总线开关，并通过控制总线开关的状态选择总线上总线代理连接点的数量。

公开(公告)号：US5860142A

公开(公告)日：1999-01-12

申请号：US775023

申请日：1996-12-27

申请人： Darren J. Cepulis

发明人： Darren J. Cepulis

IPC分类号： G06F12/06 ,  G06F12/00

CPC分类号： G06F12/063 ,  Y10S707/99953 ,  Y10S707/99956

摘要： A computer system including a host bus, a processor that asserts addresses between a lowest address and a highest address, at least one peripheral component interconnect (PCI) bus coupled to the host bus, at least one PCI device coupled to the PCI buses, and system memory devices that are mapped between the lowest address and an upper system memory address defined by PCI memory. Each PCI device has memory that is mapped in reverse and descending order in the PCI memory, which is located between a predetermined upper PCI memory address and the upper system memory address below the upper PCI memory address. The determination of the upper system memory through the reverse and descending mapping enables increased usage of system memory. The PCI devices coupled through each host PCI bus and its corresponding subordinate PCI buses are mapped together, resulting in a segment in the PCI memory for each host PCI bus. Further, for each host PCI bus and its subordinate PCI buses, if any, the non-prefetchable memory is grouped together and then the prefetchable memory is grouped together resulting in two sections within each segment. Such mapping provides efficient mapping of PCI devices, resulting in even greater usage of system memory.

摘要翻译： 一种计算机系统，包括主机总线，确定最低地址和最高地址之间的地址的处理器，耦合到所述主机总线的至少一个外围组件互连（PCI）总线，耦合到所述PCI总线的至少一个PCI设备，以及 映射在由PCI存储器定义的最低地址和较高系统存储器地址之间的系统存储器件。 每个PCI设备具有在PCI存储器中以反向和降序映射的存储器，PCI存储器位于预定的上部PCI存储器地址和位于上部PCI存储器地址之下的上部系统存储器地址之间。 通过反向和降序映射确定上层系统内存可以增加系统内存的使用。 通过每个主机PCI总线及其对应的从属PCI总线耦合的PCI设备被映射到一起，导致用于每个主机PCI总线的PCI存储器中的段。 此外，对于每个主机PCI总线及其从属PCI总线（如果有的话），将不可预取存储器分组在一起，然后可预取存储器被分组在一起，从而在每个段内产生两个部分。 这种映射提供PCI设备的有效映射，导致系统存储器的更大的使用。

公开(公告)号：US5729675A

公开(公告)日：1998-03-17

申请号：US700300

申请日：1996-08-20

申请人： David A. Miller ,  Kenneth A. Jansen ,  Montgomery C. McGraw ,  Darren J. Cepulis

发明人： David A. Miller ,  Kenneth A. Jansen ,  Montgomery C. McGraw ,  Darren J. Cepulis

IPC分类号： G06F9/445 ,  G06F11/14 ,  G06F11/20 ,  G06F11/22 ,  G06F1/24 ,  G06F9/24

CPC分类号： G06F11/1417 ,  G06F11/22 ,  G06F11/2284 ,  G06F15/177 ,  G06F9/4403 ,  G06F9/4405 ,  G06F11/2038 ,  G06F11/2043 ,  G06F9/4416

摘要： Two design variations which allow multiple processors to start up using a single ROM are disclosed. In each design, a single, primary processor is allowed to perform a complete POST while the remaining, secondary processors are directed in the course of their POST to perform a more limited initialization sequence. At power on, the primary processor begins a normal POST, while the secondary processors are held until a vector is placed into a redirection vector location. Each secondary processor is then subsequently started, using its own initialization code located at the address indicated by the redirection vector. The first technique is applicable to general multiprocessor systems because the implementation of this design can be run either from external software or from an addition to the operating system of the particular machine on which it is being used. The second technique is more specifically oriented to a particular system, and includes the use of an identity register to differentiate between primary and secondary processors.

摘要翻译： 公开了允许使用单个ROM启动多个处理器的两种设计变型。 在每个设计中，允许单个主处理器执行完整的POST，而剩余的辅助处理器在其POST过程中被引导以执行更有限的初始化序列。 上电时，主处理器开始正常POST，而辅助处理器保持，直到向量放置到重定向向量位置。 然后，使用其位于由重定向向量指示的地址处的自己的初始化代码随后启动每个二级处理器。 第一种技术适用于一般的多处理器系统，因为该设计的实现可以从外部软件或从使用它的特定机器的操作系统的添加运行。 第二种技术更具体地针对特定系统，并且包括使用身份寄存器来区分主处理器和辅助处理器。