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公开(公告)号：US07233427B2
公开(公告)日：2007-06-19
申请号：US11391015
申请日：2006-03-28
Applicant: Donald B. Doherty , Daniel J. Morgan
Inventor： Donald B. Doherty , Daniel J. Morgan
CPC classification number: G09G3/342 , G09G3/346 , G09G2310/0235 , G09G2310/024 , G09G2310/08 , G09G2320/0626 , G09G2360/145 , H04N5/7458 , H04N9/3114 , H04N9/3123 , H04N9/3194
Abstract: A display system includes a light source 110 and a spatial light modulator 122 located to receive light from the light source. The spatial light modulator (e.g., a DMD) includes a number of independently controllable elements that are activated for a period of time to display light of a desired brightness. A light sensor 136 is located to determine a characteristic of light from the light source 110. A control circuit 126 is coupled to the spatial light modulator 122 and controls the period of time that the independently controllable elements are activated. This period of time is based at least in part by an input received from the light sensor 136.
Abstract translation: 显示系统包括光源110和位置以接收来自光源的光的空间光调制器122。 空间光调制器（例如，DMD）包括多个可独立控制的元件，其被激活一段时间以显示期望亮度的光。 光传感器136被定位以确定来自光源110的光的特性。 控制电路126耦合到空间光调制器122并且控制独立可控元件被激活的时间段。 该时间段至少部分地基于从光传感器136接收的输入。
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公开(公告)号：US07164397B2
公开(公告)日：2007-01-16
申请号：US10675194
申请日：2003-09-30
Applicant: Gregory S. Pettitt , Donald B. Doherty
Inventor： Gregory S. Pettitt , Donald B. Doherty
CPC classification number: H04N5/7458 , G09G3/2003 , G09G3/2022 , G09G3/346 , G09G2310/0235 , G09G2320/0271 , G09G2320/0285 , G09G2340/06 , H04N5/74 , H04N9/3114 , H04N9/312
Abstract: Methods and apparatus for use with a discrete bit display system such as a DLP® display system for increasing brightness by using secondary light bits (such as spoke bits that are otherwise wasted). The light available from the secondary bits is distributed over the entire input/output dynamic range by determining the maximum possible output and then defining the dynamic output range from zero to that maximum range in response to the full range of the input signals.
Abstract translation: 用于离散位显示系统（例如DLP显示系统）的方法和装置，用于通过使用次级光位（例如否则浪费的辐条位）来增加亮度。 通过确定最大可能的输出，然后根据输入信号的全部范围，将动态输出范围从零定义到最大范围，从次级位可用的光分布在整个输入/输出动态范围内。
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公开(公告)号：US07019881B2
公开(公告)日：2006-03-28
申请号：US10458045
申请日：2003-06-10
Applicant: Donald B. Doherty , Daniel J. Morgan
Inventor： Donald B. Doherty , Daniel J. Morgan
IPC: G02F1/03
CPC classification number: G09G3/342 , G09G3/346 , G09G2310/0235 , G09G2310/024 , G09G2310/08 , G09G2320/0626 , G09G2360/145 , H04N5/7458 , H04N9/3114 , H04N9/3123 , H04N9/3194
Abstract: A display system includes a light source 110 and a spatial light modulator 122 located to receive light from the light source. The spatial light modulator (e.g., a DMD) includes a number of independently controllable elements that are activated for a period of time to display light of a desired brightness. A light sensor 136 is located to determine a characteristic of light from the light source 110. A control circuit 126 is coupled to the spatial light modulator 122 and controls the period of time that the independently controllable elements are activated. This period of time is based at least in part by an input received from the light sensor 136.
Abstract translation: 显示系统包括光源110和位置以接收来自光源的光的空间光调制器122。 空间光调制器（例如，DMD）包括多个可独立控制的元件，其被激活一段时间以显示期望亮度的光。 光传感器136被定位以确定来自光源110的光的特性。控制电路126耦合到空间光调制器122并且控制独立可控元件被激活的时间段。 该时间段至少部分地基于从光传感器136接收的输入。
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公开(公告)号：US06300963B1
公开(公告)日：2001-10-09
申请号：US08342671
申请日：1994-11-21
Applicant: Paul M. Urbanus , Donald B. Doherty
Inventor： Paul M. Urbanus , Donald B. Doherty
IPC: G09G536
CPC classification number: G09G3/34 , G09G3/2018 , G09G3/346 , G09G5/39 , G09G2360/18
Abstract: A display memory (15) for a display system (10, 20) having a spatial light modulator (SLM) (16). The memory (15) receives data in pixel format and delivers the data to the SLM (16) in bit-plane format. The memory (15) avoids the need for double buffering by reading out bit-planes that are comprised partly of data from one data from and partly of data from an adjacent data frame.
Abstract translation: 一种用于具有空间光调制器（SLM）（16）的显示系统（10,20）的显示存储器（15）。 存储器（15）以像素格式接收数据，并以位平面格式将数据传送到SLM（16）。 存储器（15）通过从相邻数据帧的数据中的一个数据部分地读出部分地由数据组成的位平面，从而避免了双重缓冲的需要。
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公开(公告)号：US6115083A
公开(公告)日：2000-09-05
申请号：US964516
申请日：1997-11-05
Applicant: Donald B. Doherty , Gregory J. Hewlett
Inventor： Donald B. Doherty , Gregory J. Hewlett
CPC classification number: H04N9/30 , G09G3/34 , H04N5/7458 , G09G2310/0235 , G09G2310/061 , G09G2310/062 , G09G3/2018 , G09G3/346 , H04N2005/7466
Abstract: A sequence controller (18) for controlling load/reset sequences for a spatial light modulator (15). The sequence controller has a program memory (41) for storing load instructions and reset instructions. A load control processor (42) executes load instructions. A reset control processor (43) executes reset instructions. The two processors (42, 43) operate independently except for synchronization.
Abstract translation: 一种用于控制空间光调制器（15）的负载/复位序列的序列控制器（18）。 序列控制器具有用于存储加载指令和复位指令的程序存储器（41）。 负载控制处理器（42）执行加载指令。 复位控制处理器（43）执行复位指令。 除了同步之外，两个处理器（42,43）独立地操作。
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Patent Agency Ranking
公开(公告)号：US5838385A
公开(公告)日：1998-11-17
申请号：US706367
申请日：1996-08-30
Applicant: John R. Reder , Donald B. Doherty
Inventor： John R. Reder , Donald B. Doherty
Abstract: A data converter (13) for providing data for secondary images in a video display system (10). One embodiment (FIG. 2) provides data for a staggered pixel array, by using an A/D converter (23) to sample the data at a rate of 2/n(h) times the sample rate of the main image, where 1/n(h) is the horizontal scaling factor. A multiplexer (24) selects between two different sample patterns. Another embodiment (FIG. 3) provides data for progressively scanned secondary images by selecting 2/n(v) times the number of lines per input field, where 1/n(v) is the vertical scaling factor.
Abstract translation: 一种用于在视频显示系统（10）中提供二次图像数据的数据转换器（13）。 一个实施例（图2）通过使用A / D转换器（23）以主要图像的采样率的2 / n（h）倍的速率对数据进行采样来提供交错像素阵列的数据，其中1 / n（h）是水平缩放因子。 多路复用器（24）在两个不同的样本图案之间进行选择。 另一个实施例（图3）通过选择每个输入字段的行数2 / n（v）次来提供逐渐扫描的二次图像的数据，其中1 / n（v）是垂直缩放因子。
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公开(公告)号：US5764208A
公开(公告)日：1998-06-09
申请号：US736169
申请日：1996-10-23
Applicant: Mark L. Burton , Donald B. Doherty
Inventor： Mark L. Burton , Donald B. Doherty
CPC classification number: G09G3/346 , H04N5/7458 , G09G2310/061 , G09G3/2018 , H04N2005/7466
Abstract: A method for causing a micromechanical spatial light modulator to display data for a period less than its settling time. The modulator elements receive a first pulse (40) that causes them to release from their previous state, a bias voltage is removed and reapplied, allowing the elements to move to the unaddressed state, and then the elements receive a second pulse (46). After receiving a second pulse, the elements assume an unaddressed state. In one embodiment, new address data is loaded during this unaddressed state, after which a bias is reapplied causing them to achieve the state corresponding to the new state. In another embodiment, the previous addresses are cleared during the unaddressed state, forcing the elements into an OFF state. In either embodiment, a reset pulse may be applied after either the load or clear step.
Abstract translation: 一种使微机械空间光调制器在小于其建立时间的时间内显示数据的方法。 调制器元件接收使其从先前状态释放的第一脉冲（40），去除偏置电压并重新施加，允许元件移动到未处理状态，然后元件接收第二脉冲（46）。 在接收到第二脉冲之后，这些元件呈现未处理状态。 在一个实施例中，在该未处理状态期间加载新的地址数据，之后重新应用偏置，使得它们实现对应于新状态的状态。 在另一实施例中，先前的地址在未处理状态期间被清除，迫使元件进入OFF状态。 在任一实施例中，可以在加载或清除步骤之后施加复位脉冲。
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公开(公告)号：US5751379A
公开(公告)日：1998-05-12
申请号：US725719
申请日：1996-10-04
Applicant: Vishal Markandey , Donald B. Doherty , Robert J. Gove
Inventor： Vishal Markandey , Donald B. Doherty , Robert J. Gove
CPC classification number: G09G3/2007 , G09G3/2037 , H04N5/7458 , G09G2320/0266 , G09G3/2018 , G09G3/346 , H04N2005/7466
Abstract: A method of pulse width modulation using a spatial light modulator (40) with a finite transition time. The method uses m bits per sample to digitize the incoming data, but apportions the LSB times for pulse width modulation based upon m-1 bits. The current video frame displays all of the bits for each sample, except for the LSBs for each sample. The next video frame displays all of the bits for each sample, adding one more LSB for dividing up the frame time. The first frame could use either the additional LSB time and display no data, or it could use only that number of LSB times it needs. In the latter, the system will have to adjust to different partitions of the frame time for alternating frames. The system includes a spatial light modulator (40), a memory (42), a formatter (48), a sequence controller (44) and a toggle circuit (46), to perform this method.
Abstract translation: 一种使用具有有限转换时间的空间光调制器（40）进行脉宽调制的方法。 该方法使用每个采样的m位数字化输入数据，但是基于m-1位分配用于脉宽调制的LSB时间。 当前视频帧显示每个样本的所有位，除了每个样本的LSB。 下一个视频帧显示每个样本的所有位，并添加一个LSB以分割帧时间。 第一帧可以使用附加的LSB时间并且不显示任何数据，也可以仅使用其需要的LSB次数。 在后者中，系统将必须调整到不同分区的帧时间的交替帧。 该系统包括空间光调制器（40），存储器（42），格式化器（48），序列控制器（44）和切换电路（46），以执行该方法。
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39.发明授权Apparatus and method for increasing compensation sequence storage density in a projection visual display system 有权在投影视觉显示系统中增加补偿顺序存储密度的装置和方法公开(公告)号：US08614723B2
公开(公告)日：2013-12-24
申请号：US11614105
申请日：2006-12-21
Applicant: Roman J. Pacheco , Donald B. Doherty , Larry D. Dickinson
Inventor： Roman J. Pacheco , Donald B. Doherty , Larry D. Dickinson
CPC classification number: G03B21/26
Abstract: An apparatus for, and method of, increasing compensation sequence storage density in a projection visual display system and a projection visual display system incorporating the apparatus or the method. In one embodiment, the apparatus includes: (1) a memory containing a first compensation sequence portion that is common to a plurality of effective transmission factors and a plurality of second compensation sequence portions that are unique to a corresponding plurality of effective transmission factors and (2) a compensation sequence generator coupled to the memory and configured to construct a compensation sequence for use in the projection visual display system using the first compensation sequence portion and one of the plurality of second compensation sequence portions selected as a function of a particular effective transmission factor.
Abstract translation: 一种用于增加投影视觉显示系统中的补偿顺序存储密度的装置和方法，以及包含该装置或方法的投影视觉显示系统。 在一个实施例中，该装置包括：（1）存储器，其包含多个有效传输因子共有的第一补偿序列部分和对应的多个有效传输因子是唯一的多个第二补偿序列部分，和 2）补偿序列发生器，其耦合到所述存储器并且被配置为构建使用所述投影视觉显示系统中的补偿序列，所述补偿序列部分使用所述第一补偿序列部分和作为特定有效传输的函数选择的所述多个第二补偿序列部分中的一个 因子。
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公开(公告)号：US06970150B2
公开(公告)日：2005-11-29
申请号：US10102499
申请日：2002-03-19
Applicant: Gregory J. Hewlett , Donald B. Doherty
Inventor： Gregory J. Hewlett , Donald B. Doherty
CPC classification number: G09G3/346 , G02B26/0841 , G09G3/2037 , H04N5/7458 , H04N9/3102 , H04N9/3114 , H04N9/312
Abstract: A spatial light modulator clocking method, called fast-clear, which employs embedded clear hardware in the SLM to enable the fast-clear bit to generate least-significant short-bit periods and without any bit ordering restrictions. In this method, fast data clears 34 are inserted between block data loads 32,36 within a frame refresh period. This method virtually eliminates the artifacts associated with the earlier reset-release timing method without the bit-ordering restriction of the jog-clear method.
Abstract translation: 一种称为快清晰度的空间光调制器时钟方法，其在SLM中采用嵌入式清晰硬件，以使快速清除位产生最低有效的短位周期，并且没有任何位排序限制。 在该方法中，在帧刷新周期内的块数据加载32,36之间插入快速数据清除34。 该方法实际上消除了与较早的复位释放定时方法相关联的伪像，而没有点动清除方法的位排序限制。
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