摘要:
A sensing circuit (120) for sensing currents, including: a measure circuit branch (132i), having a measure node for receiving an input current (Ic) to be sensed, for converting the input current into a corresponding input voltage (V−); at least one comparison circuit branch (132o), having a comparison node for receiving a comparison current (Igs), for converting the comparison current into a corresponding comparison voltage (V+); and at least one voltage comparator (140) for comparing the input and comparison voltages, and a comparison current generating circuit (N3s, 135; N3s, 135′; N3s, 135″) for generating the comparison current based on a reference current (Ir). The comparison current generating circuit includes at least one voltage generator (135; 135′; 135″). A memory device using the sensing circuit and a method are also provided.
摘要翻译:一种用于感测电流的感测电路(120),包括:测量电路分支(132i),具有用于接收待感测的输入电流(Ic)的测量节点,用于将输入电流转换成对应的输入电压(V- ); 至少一个比较电路分支(132o),具有用于接收比较电流(Igs)的比较节点,用于将比较电流转换成对应的比较电压(V +); 以及用于比较输入和比较电压的至少一个电压比较器(140)和用于产生比较电流的比较电流产生电路(N 3 s,135; N 3 s,135'; N 3 s,135“) 基于参考电流(Ir)。 比较电流产生电路包括至少一个电压发生器(135; 135'; 135“)。 还提供了使用感测电路的存储器件和方法。
摘要:
A sense amplifier for a memory includes a comparator and a bit line polarization circuit. The comparator receives a first signal representative of a current flowing through a memory cell and a second signal representative of a reference current. Additionally, the comparator includes a stage in a common source configuration and an active load for the stage, and the bit line polarization circuit provides a polarization voltage level that is independent of the supply voltage level. In a preferred embodiment, the sense amplifier also includes an output stage that improves switching time at high supply voltages.
摘要:
A current reference circuit for low supply voltages is provided. The current reference circuit includes a series including a resistor and a diode, a current source having one terminal coupled to a supply voltage and another terminal coupled to the series, an operational amplifier having its negative electrode connected to a band gap reference voltage, and a transistor. The diode has its cathode electrode coupled to ground and its anode electrode coupled to the resistor. The transistor has its gate electrode coupled to the output of the operational amplifier, its source electrode coupled to ground, and its drain electrode coupled to both the positive electrode of the operational amplifier and the current source. Also provided are an integrated circuit that includes at least one current reference circuit for low supply voltages and a signal processing system that includes at least one current reference circuit for low supply voltages.
摘要:
A voltage converter device includes a voltage regulator having a supply terminal for receiving a supply voltage and an output terminal for providing a regulated voltage. A voltage multiplier is for receiving the regulated voltage and providing a boosted voltage higher in absolute value than the regulated voltage. The voltage multiplier includes circuitry for providing a clock signal that switches periodically between the regulated voltage and a reference voltage, and a sequence of capacitive stages that alternately accumulate and transfer electric charge according to the clock signal for generating the boosted voltage from the regulated voltage. The voltage regulator includes a power transistor and a regulation transistor each having a first conduction terminal, a second conduction terminal and a control terminal.
摘要:
An electronic device including a set of functional block, and a biasing block for generating a set of bias voltages for the functional blocks. The electronic device further includes a holding block coupled between the biasing block and the functional blocks for providing each bias voltage to at least one corresponding functional block, for each bias voltage the holding block including a capacitive element for storing the bias voltage, and a switch element switchable between an accumulation condition wherein provides the bias voltage from the biasing block to the capacitive element and to the at least one corresponding functional block, and a release condition wherein isolates the capacitive element from the biasing block and provides the bias voltage from the capacitive element to the at least one corresponding functional block, and a control block for alternately switching the switching elements between the accumulation condition and the release condition.
摘要:
The charge pump circuit has a plurality of cascaded charge pump stages, each provided with a first pump capacitor connected to a first internal node and receiving a first high voltage phase signal, and a second pump capacitor connected to a second internal node and receiving a second high voltage phase signal, complementary with respect to the first. A first transfer transistor is coupled between the first internal node and an intermediate node, and a second transfer transistor is coupled between the second internal node and the intermediate node. The first and second high voltage phase signals have a voltage dynamics higher than a maximum voltage sustainable by the first and second transfer transistors. A protection stage is set between the first internal node and second internal node and respectively, the first transfer transistor and second transfer transistor, for protecting the same transfer transistors from overvoltages.
摘要:
A charge pump including first and a second charge-pump stages electrically coupled, four pump capacitors connected between two enable terminals and four internal nodes, two pump transistors connected to the pump capacitors and to the internal nodes, and having respective control terminals, two biasing capacitors, connected between the control terminals and the enable terminals, and an equalization circuit connected between the control terminals and structured to limit the voltage between the control terminals within a first range of values.
摘要:
An EEPROM memory having a matrix of individually selectable memory cells, the matrix having a plurality of columns, a plurality of data lines each coupled with the cells of a corresponding column, the data lines being grouped in a plurality of packets, a plurality of biasing elements for providing a biasing signal to the data lines, and means for selecting the biasing elements for a selected one of the packets, wherein each biasing element is associated with corresponding data lines of a plurality of packets, the biasing element comprising switching means for selectively applying the biasing signal to a selected one of the associated data lines.
摘要:
An embodiment of a circuit is described for the generation of a temperature-compensated voltage reference of the type comprising at least one generator circuit of a band-gap voltage, inserted between a first and a second voltage reference and including an operational amplifier, having in turn a first and a second input terminal connected to an input stage connected to these first and second input terminal and comprising at least one pair of a first and a second bipolar transistor for the generation of a first voltage component proportional to the temperature. The circuit also comprises the control block connected to the generator circuit of a band-gap voltage in correspondence with at least one first control node which is supplied with a biasing voltage value comprising at least one voltage component which increases with the temperature for compensating the variations of the base-emitter voltage of the first and second bipolar transistors and ensure the turn-on of a pair of input transistors of the operational amplifier. The circuit has an output terminal suitable for supplying a temperature-compensated voltage value obtained by the sum of the first voltage component proportional to the temperature and of a second component inversely proportional to the temperature.
摘要:
A latch-type charge pump circuit is provided having first and second charge pump stages interconnected by an intermediate circuit node. The charge pump circuit includes first pump capacitors respectively coupled between first and second enable terminals and respective first inner circuit nodes, second pump capacitors respectively coupled between the second and first enable terminals and respective second inner circuit nodes, latch transistors coupled between each of the first and second inner circuit nodes and the intermediate circuit node, and a stabilization circuit having at least one stabilization stage coupled between the intermediate circuit node and the first and second enable terminals and connected to control terminals of the latch transistors for supplying them with suitable control signals so as to ensure their correct turn-on and turn-off during a charge sharing period of the charge pump circuit.