ELECTROMECHANICAL LINEAR ACTUATOR
    34.
    发明申请
    ELECTROMECHANICAL LINEAR ACTUATOR 审中-公开
    电动线性执行器

    公开(公告)号:US20160226349A1

    公开(公告)日:2016-08-04

    申请号:US14556984

    申请日:2014-12-01

    CPC classification number: H02K11/21 H02K16/00 H02K41/033 H02K2213/06

    Abstract: A linear actuator includes an actuator housing. The actuator housing includes a plurality of motors providing linear movement along a motor drive axis wherein the motor drive axes are parallel, and wherein the motors are within the housing. Each motor includes a stator for applying an electromagnetic force and a rod movable within the stator. The electromagnetic force from the stator drives the rod to extend from and retract into the stator along the motor drive axis of that motor.

    Abstract translation: 线性致动器包括致动器壳体。 致动器壳体包括多个电动机,其沿着电动机驱动轴提供线性运动,其中电动机驱动轴线是平行的,并且其中电动机在壳体内。 每个电动机包括用于施加电磁力的定子和可在定子内移动的杆。 来自定子的电磁力驱动杆沿着该电动机的电动机驱动轴线从定子延伸并缩回到定子中。

    Fault protection of a variable differential transformer (VDT) excitation circuit
    35.
    发明授权
    Fault protection of a variable differential transformer (VDT) excitation circuit 有权
    可变差动变压器(VDT)励磁电路的故障保护

    公开(公告)号:US09214802B2

    公开(公告)日:2015-12-15

    申请号:US14227004

    申请日:2014-03-27

    CPC classification number: H02H7/04 H02H3/08

    Abstract: An excitation circuit includes an operational amplifier, a transistor circuit, a switch, and a pull-down resistor. The operational amplifier receives an excitation input voltage at a non-inverting input and provides an operational amplifier output. The transistor circuit receives the operational amplifier output and provides a transistor circuit output. The transistor circuit output is connected to an inverting input of the operational amplifier. The switch is connected between the operational amplifier output and the transistor circuit. The switch is opened to disconnect the operational amplifier output from the transistor circuit. The pull-down resistor is connected between an output of the switch and ground, wherein the pull-down resistor turns off the transistor circuit when the switch is opened.

    Abstract translation: 励磁电路包括运算放大器,晶体管电路,开关和下拉电阻。 运算放大器在非反相输入端接收激励输入电压,并提供运算放大器输出。 晶体管电路接收运算放大器输出并提供晶体管电路输出。 晶体管电路输出连接到运算放大器的反相输入端。 开关连接在运算放大器输出和晶体管电路之间。 打开开关以断开晶体管电路的运算放大器输出。 下拉电阻连接在开关的输出和地之间,其中当开关断开时,下拉电阻关断晶体管电路。

    Current balancing
    36.
    发明授权

    公开(公告)号:US11128132B2

    公开(公告)日:2021-09-21

    申请号:US16800305

    申请日:2020-02-25

    Abstract: A system includes a first input line for a first voltage source, wherein the first input line is connected to a first output. A second input line is included for a second voltage source, wherein the second input line is connected to a second output and is in parallel with the first input line. A first series pass element is connected in series with the first input line, and a second series pass element is connected in series with the second input line. A controller is operatively connected to the first series pass element and to the second series pass element to throttle at least one of the first series pass element and the second series pass element to balance output current in the first and second outputs.

    CURRENT BALANCING
    37.
    发明申请

    公开(公告)号:US20210265836A1

    公开(公告)日:2021-08-26

    申请号:US16800305

    申请日:2020-02-25

    Abstract: A system includes a first input line for a first voltage source, wherein the first input line is connected to a first output. A second input line is included for a second voltage source, wherein the second input line is connected to a second output and is in parallel with the first input line. A first series pass element is connected in series with the first input line, and a second series pass element is connected in series with the second input line. A controller is operatively connected to the first series pass element and to the second series pass element to throttle at least one of the first series pass element and the second series pass element to balance output current in the first and second outputs.

    CURRENT BALANCING
    38.
    发明申请

    公开(公告)号:US20210263543A1

    公开(公告)日:2021-08-26

    申请号:US17175583

    申请日:2021-02-12

    Abstract: A system comprises a first current balancer and a second current balancer. Each of the first and second current balancers includes a first input line for a first voltage source connected to a first output, a second input line for a second voltage source connected to a second output and is in parallel with the first input line, a first series pass element connected in series with the first input line, and a second series pass element connected in series with the second input line. The system further includes a controller operatively connected to the first series pass element and to the second series pass element to throttle at least one of the first series pass element and the second series pass element to balance output current in the first and second outputs.

    MULTIPURPOSE RELAY CONTROL
    39.
    发明申请

    公开(公告)号:US20210110986A1

    公开(公告)日:2021-04-15

    申请号:US16601112

    申请日:2019-10-14

    Abstract: A method of controlling the behavior of a latching relay includes receiving a configuration signal of either a first behavior signal or a second behavior signal, receiving a power status signal of either a powered or unpowerered signal, receiving either a low-to-high or a high-to-low signal command signal, generating latching pulse in response to receiving a powered signal input as the power status signal and a low-to-high signal as the command signal, generating an unlatching pulse in response to receiving a powered signal input as the power status signal and a high-to-low signal as the command signal input, and generating an unlatching pulse in response to receiving the second behavior signal as the configuration signal and the unpowered signal as the power status signal.

    Command line voting using hashing
    40.
    发明授权

    公开(公告)号:US10831383B2

    公开(公告)日:2020-11-10

    申请号:US16179152

    申请日:2018-11-02

    Abstract: Systems and methods for command line voting are provided. Aspects include obtaining, by an output logic device, a plurality of memory blocks from a plurality of buffers, each of the plurality of memory blocks including two or more output commands generated from a processing circuit based on a sensor data input, generating, by a hash function, a hash value for each of the plurality of memory blocks, comparing the hash value for each of the plurality of memory blocks to determine an output memory block from the plurality of memory blocks, and outputting, to an output hardware, the two more output commands from the output memory block.

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