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公开(公告)号：US11100025B2
公开(公告)日：2021-08-24
申请号：US16112244
申请日：2018-08-24
摘要： A system includes a computing system and a cable connector. The computing system includes a plurality of processors and an interconnect circuit configured to connect the plurality of processors to each other. The cable connector is configured to connect to the interconnect circuit and provide a channel identifier to the computing system, and the interconnect circuit is configured to set one of the plurality of processors as a system controller based on the channel identifier.
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公开(公告)号：US10785073B1
公开(公告)日：2020-09-22
申请号：US16443078
申请日：2019-06-17
IPC分类号： H03K7/08 , H04L25/49 , G05B19/05 , G06F7/575 , G05B19/045
摘要： A pulse width modulation signaling system includes a first control channel that is configured to receive a hardware Boolean command input from a first hardware status monitor, receive a software multi-bit command input from a first software system, and generate a first pulse width modulated signal that is representative of the Boolean command input and the software multi-bit command input. The hardware Boolean command input is a binary value of either a first state or a second state, the software multi-bit command input includes a binary value of either a first state or a second state, and the first pulse width modulated signal defines a duty cycle.
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公开(公告)号：US20190296675A1
公开(公告)日：2019-09-26
申请号：US16441368
申请日：2019-06-14
发明人： Steven A. Avritch
摘要： A linear motor actuator includes a plurality of stators mounted stationary relative to one another along a common actuation axis. A translator rod is mounted to the stators for linear motion relative to the stators along the actuation axis, wherein each stator is magnetically coupled to the translator rod to drive motion of the translator rod along the actuation axis.
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公开(公告)号：US20190235025A1
公开(公告)日：2019-08-01
申请号：US15881278
申请日：2018-01-26
发明人： Steven A. Avritch , David F. Dickie
CPC分类号： G01R31/343 , G01R31/06 , G01R31/346 , G01R31/42 , H02P21/22 , H02P27/06 , H02P29/0241
摘要： A method of detecting a fault in a sinusoidally controlled permanent magnet synchronous motor (PMSM). The method includes receiving a first rotor reference frame current demand, the first rotor reference frame current demand based on a current control for the PMSM and receiving a first rotor reference frame current feedback, the first rotor reference frame current feedback corresponding to the first rotor reference frame current demand received. The method also includes computing a first error of the rotor reference frame current based on the first rotor reference frame current demand and the first rotor reference frame current feedback and identifying a fault of the sinusoidally controlled PMSM if the first error exceeds a first selected threshold for a first selected duration.
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5.发明申请METHOD FOR ELECTRONICALLY TESTING INTEGRITY OF IDEAL DIODE COMPONENTS USED IN OR'D VOLTAGE BUS 有权用于电子测试在ORD电压总线中使用的理想二极管组件的完整性的方法公开(公告)号：US20160274195A1
公开(公告)日：2016-09-22
申请号：US14663250
申请日：2015-03-19
发明人： MARK J. COLLINS , Ronald Daley , Steven A. Avritch
摘要： A power system includes a first power input, a second power input, a power output, a first ideal diode coupled to the a power input and a power output and a second ideal diode coupled to a second power input and the power output. The power system also includes a first switching circuit coupled to the first power input and the first ideal diode and a second switching circuit coupled to the second power input and the second ideal diode, the switching circuits operating as an open or a short circuit based on an input. The power system also includes a test controller coupled to the first switching circuit, the second switching circuit and the power output and configured to determine an operating status of the power system based on an input to the first switch, inputs to the second switch and the power output.
摘要翻译： 电力系统包括第一电力输入，第二电力输入，电力输出，耦合到电力输入的第一理想二极管和功率输出以及耦合到第二电力输入和功率输出的第二理想二极管。 电力系统还包括耦合到第一电力输入端和第一理想二极管的第一开关电路和耦合到第二电力输入端和第二理想二极管的第二开关电路，开关电路作为开路或短路工作，基于 一个输入 电力系统还包括耦合到第一开关电路，第二开关电路和电力输出的测试控制器，并且被配置为基于对第一开关的输入来确定电力系统的运行状态，输入到第二开关和 功率输出。
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6.发明申请SYSTEM AND METHOD FOR AUTOMATED FAILURE DETECTION OF HOLD-UP POWER STORAGE DEVICES 有权用于自动故障检测的保持功率存储设备的系统和方法公开(公告)号：US20140103955A1
公开(公告)日：2014-04-17
申请号：US13649586
申请日：2012-10-11
IPC分类号： G01R31/40
CPC分类号： G01R31/028 , G01R27/2605
摘要： A fault detection circuit is utilized to automatically detect faults in hold-up power storage devices. The fault detection circuit includes a hold-up monitoring circuit and a memory device. The hold-up monitoring circuit is connected to monitor output of the hold-up power storage device, wherein the hold-up monitoring circuit measures a duration of time that the hold-up power storage device provides sufficient power following a loss of normal power and detects faults based on the measured duration of time. The memory device is connected to store the duration of time measured by the hold-up power storage device following a loss of normal power
摘要翻译： 利用故障检测电路自动检测滞留电力存储装置的故障。 故障检测电路包括保持监视电路和存储器件。 保持监视电路连接到监视保持功率存储装置的输出，其中保持监视电路测量保持功率存储装置在正常功率损耗之后提供足够功率的持续时间，以及 根据测量的持续时间检测故障。 存储器件被连接以存储在停止正常功率之后由保持功率存储设备测量的持续时间
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公开(公告)号：US11417486B2
公开(公告)日：2022-08-16
申请号：US16601112
申请日：2019-10-14
摘要： A method of controlling the behavior of a latching relay includes receiving a configuration signal of either a first behavior signal or a second behavior signal, receiving a power status signal of either a powered or unpowered signal, receiving either a low-to-high or a high-to-low signal command signal, generating latching pulse in response to receiving a powered signal input as the power status signal and a low-to-high signal as the command signal, generating an unlatching pulse in response to receiving a powered signal input as the power status signal and a high-to-low signal as the command signal input, and generating an unlatching pulse in response to receiving the second behavior signal as the configuration signal and the unpowered signal as the power status signal.
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公开(公告)号：US11300986B2
公开(公告)日：2022-04-12
申请号：US17175583
申请日：2021-02-12
摘要： A system comprises a first current balancer and a second current balancer. Each of the first and second current balancers includes a first input line for a first voltage source connected to a first output, a second input line for a second voltage source connected to a second output and is in parallel with the first input line, a first series pass element connected in series with the first input line, and a second series pass element connected in series with the second input line. The system further includes a controller operatively connected to the first series pass element and to the second series pass element to throttle at least one of the first series pass element and the second series pass element to balance output current in the first and second outputs.
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公开(公告)号：US11002569B2
公开(公告)日：2021-05-11
申请号：US15946980
申请日：2018-04-06
摘要： An example actuator control system includes a variable differential transformer (VDT) configured to measure displacement of a motor, and a motor controller configured to control the motor based on displacement data from the VDT. A circuit card assembly (CCA) interconnects the VDT to the motor controller. The CCA includes memory storing configuration data of the VDT, and the CCA is configured to provide the configuration data to the motor controller to calibrate the motor controller for use of the VDT. A method of configuring a motor controller is also disclosed.
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公开(公告)号：US20190303278A1
公开(公告)日：2019-10-03
申请号：US15943626
申请日：2018-04-02
IPC分类号： G06F11/36 , G01R31/3185
摘要： A method for testing autonomous reconfiguration logic for an electromechanical actuator includes executing a plurality of test cases against a computer model configured and operable to implement autonomous reconfiguration logic for an electromechanical actuator including a plurality of electromechanical motors to generate a first set of test results. The method further includes executing the plurality of test cases against a programmable logic device configured and operable to implement the autonomous reconfiguration logic for the electromechanical actuator to generate a second set of test results and comparing the first set of test results to the second set of test results.
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