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公开(公告)号:US20240142567A1
公开(公告)日:2024-05-02
申请号:US18487169
申请日:2023-10-16
Applicant: Infineon Technologies AG
Inventor: Andre Roger , Markus Bichl , Ljudmil Anastasov
CPC classification number: G01S7/023 , G01S7/356 , G01S13/872
Abstract: It is suggested to process radar signals at a first radar unit as follows: (i) receiving the radar signals via at least one receiving antenna; (ii) selecting a portion of the radar signals or of data that is based on the radar signals for further processing; and (iii) conveying a reduced amount of data to a second radar unit, wherein the reduced amount of data is based on the portion of the radar signals or of data that is based on the radar signals.
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公开(公告)号:US11906652B2
公开(公告)日:2024-02-20
申请号:US17202757
申请日:2021-03-16
Applicant: Infineon Technologies AG
Inventor: Andre Roger , Markus Bichl , Farhan Bin Khalid
IPC: G01S13/536 , G01S7/35
CPC classification number: G01S7/354 , G01S13/536 , G01S7/356
Abstract: A Signal Processing Unit (SPU) having a thresholding circuit configured to detect a peak cell of a radar data cube, and to output an identification of the peak cell and energy values of the peak cell and its adjacent cells; and an interpolation circuit coupled to the thresholding circuit, and configured to determine and transmit from the SPU to a Digital Signal Processor (DSP), a relative position of the peak cell between the adjacent cells based on the energy values.
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公开(公告)号:US11789114B2
公开(公告)日:2023-10-17
申请号:US17115540
申请日:2020-12-08
Applicant: Infineon Technologies AG
Inventor: Andre Roger , Markus Bichl , Maximilian Eschbaumer , Farhan Bin Khalid , Paul Meissner
IPC: G01S7/35 , G01S13/56 , G01S13/536 , G01S7/02 , G01S13/931
CPC classification number: G01S7/354 , G01S7/023 , G01S13/536 , G01S13/56 , G01S13/931
Abstract: A method for the use in a radar system comprises: receiving an RF radar signal; down-converting the received RF radar signal into a base band using a frequency-modulated local oscillator signal including a scanning chirp having a higher bandwidth than a regular chirp bandwidth; generating a digital base band signal based on the down-converted RF radar signal, the digital base band signal including a sequence of samples associated with the scanning chirp; identifying, in the sequence of samples, impaired samples, which are affected by interference; and selecting—based on the position of the impaired samples within the sequence of samples—a sub-band, which has the regular chirp bandwidth, for transmitting chirps of chirp frame used for measurement data acquisition.
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公开(公告)号:US20230096861A1
公开(公告)日:2023-03-30
申请号:US17948262
申请日:2022-09-20
Applicant: Infineon Technologies AG
Inventor: Markus Bichl , Mayeul Jeannin
Abstract: A circuit includes a signal processing unit to generate a radar map represented by an array with a first index and a second index, and a peak detection unit to identify potential targets in the radar map. Within the peak detection unit, a first peak detection sub-unit scans the radar map along the first index and stores a first detection bitmap that identifies peaks as a function of the first index, and a second peak detection sub-unit scans the radar map along the second index and outputs a second detection bitmap that identifies peaks as a function of the second index. The first detection bitmap and the second detection bitmap identify the peaks using a single bit. A hardware accelerator processes individual bits of the first detection bitmap and of the second detection bitmap.
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公开(公告)号:US11531086B2
公开(公告)日:2022-12-20
申请号:US16169159
申请日:2018-10-24
Applicant: Infineon Technologies AG
Inventor: Andre Roger , Markus Bichl , Romain Ygnace
IPC: G01S7/35 , G01S7/02 , G01S7/288 , G01S13/26 , G01S13/931
Abstract: A radar device is disclosed including an input DMA module, at least one processing module, and an output DMA module. The input DMA module is arranged to access a memory and supply data from the memory to the at least one processing module, wherein each of the processing modules is arranged to be enabled or disabled. The at least one processing module that is enabled is arranged to process at least a portion of the data supplied by the input DMA module, and the output DMA module is arranged to store the data that are processed by the at least one processing module that is enabled in the memory. Also, a method for processing data by a radar device is provided.
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公开(公告)号:US20220399886A1
公开(公告)日:2022-12-15
申请号:US17836181
申请日:2022-06-09
Applicant: Infineon Technologies AG
Inventor: Mihail Jefremow , David Zipperstein , Juergen Schaefer , Holger Dienst , Markus Bichl , Ralph Mueller-Eschenbach , Arndt Voigtlaender
Abstract: According to an example, an electronic device includes a component, a supply line providing a supply voltage, a transistor with a control input, a linear first control loop, and a non-linear second control loop. The transistor outputs an output voltage to the component depending on a signal applied to the control input. The linear first control loop includes an ADC to convert an analog output voltage level into a digital measurement signal, a controller to generate a digital control signal for the transistor depending on the digital measurement signal, and a DAC to convert the digital control signal into a first analog control signal. The non-linear second control loop is configured to generate a second analog control signal depending on the analog output voltage level. The second analog control signal is superimposed with the first analog control signal and the combined control signals are fed to the control input of the transistor.
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公开(公告)号:US20220299597A1
公开(公告)日:2022-09-22
申请号:US17202757
申请日:2021-03-16
Applicant: Infineon Technologies AG
Inventor: Andre Roger , Markus Bichl , Farhan Bin Khalid
IPC: G01S7/35 , G01S13/536
Abstract: A Signal Processing Unit (SPU) having a thresholding circuit configured to detect a peak cell of a radar data cube, and to output an identification of the peak cell and energy values of the peak cell and its adjacent cells; and an interpolation circuit coupled to the thresholding circuit, and configured to determine and transmit from the SPU to a Digital Signal Processor (DSP), a relative position of the peak cell between the adjacent cells based on the energy values.
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公开(公告)号:US11366198B2
公开(公告)日:2022-06-21
申请号:US16751404
申请日:2020-01-24
Applicant: Infineon Technologies AG
Inventor: Markus Bichl , Ljudmil Anastasov , Romain Ygnace
Abstract: A method for processing a radar signal includes adjusting a processing clock signal, wherein the processing clock signal determines an operation period of a signal processing circuit, wherein the processing clock signal is determined based on a time window, wherein the size of the time window is determined based on the maximum time available for processing a portion of the radar signal and wherein the end of the time window is determined such that it does not occur during an active transmission portion of the radar system.
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公开(公告)号:US20220018933A1
公开(公告)日:2022-01-20
申请号:US17374048
申请日:2021-07-13
Applicant: Infineon Technologies AG
Inventor: Dian Tresna Nugraha , Markus Bichl , Dyson Wilkes
Abstract: Signal processing circuitry includes at least one processor configured to obtain a digitized radar signal, and further configured, for one or more iterations, to: determine a first power of at least one first signal sample of the radar signal; determine a second power of at least one second signal sample of the radar signal, the at least one second signal sample being subsequent in time to the at least one first signal sample; and determine a difference value between the second power and the first power. The at least one processor further configured to detecting a burst interference signal occurring within the radar signal based on the one or more difference values from the one or more iterations.
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公开(公告)号:US20200256950A1
公开(公告)日:2020-08-13
申请号:US16751404
申请日:2020-01-24
Applicant: Infineon Technologies AG
Inventor: Markus Bichl , Ljudmil Anastasov , Romain Ygnace
Abstract: A method for processing a radar signal includes adjusting a processing clock signal, wherein the processing clock signal determines an operation period of a signal processing circuit, wherein the processing clock signal is determined based on a time window, wherein the size of the time window is determined based on the maximum time available for processing a portion of the radar signal and wherein the end of the time window is determined such that it does not occur during an active transmission portion of the radar system.
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