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    TIME MEASUREMENT OF A CLOCK-BASED SIGNAL
    2.
    发明申请
    TIME MEASUREMENT OF A CLOCK-BASED SIGNAL 有权

    公开(公告)号：US20220085824A1

    公开(公告)日：2022-03-17

    申请号：US17467767

    申请日：2021-09-07

    Applicant: Infineon Technologies AG

    Inventor： Mihail Jefremow ,  Ketan Dewan ,  Rex Kho ,  Ralph Mueller-Eschenbach ,  Juergen Schaefer

    IPC: H03M1/12 ,  G06F1/10 ,  G01R31/317

    Abstract: A device is provided for time measurement of a clock-based signal comprising a sample stage comprising a switching device that is driven by a control signal and a capacitance (Cs), wherein the sample stage is arranged to transform an analog input signal in an analog output signal, the device further comprising an analog-to-digital converter to convert the analog output signal into a digital output signal, wherein the input signal applied to the sample stage is a reference signal and wherein the clock-based signal is applied to the control signal. Also, an according method is suggested.

    Electronic device
    3.
    发明授权
    Electronic device 有权

    公开(公告)号：US11831306B2

    公开(公告)日：2023-11-28

    申请号：US17836181

    申请日：2022-06-09

    Applicant: Infineon Technologies AG

    Inventor： Mihail Jefremow ,  David Zipperstein ,  Juergen Schaefer ,  Holger Dienst ,  Markus Bichl ,  Ralph Mueller-Eschenbach ,  Arndt Voigtlaender

    IPC: H03K17/56 ,  H03M3/00 ,  G01S7/03

    CPC classification number: H03K17/56 ,  H03M3/458 ,  H03M3/50 ,  G01S7/03

    Abstract: According to an example, an electronic device includes a component, a supply line providing a supply voltage, a transistor with a control input, a linear first control loop, and a non-linear second control loop. The transistor outputs an output voltage to the component depending on a signal applied to the control input. The linear first control loop includes an ADC to convert an analog output voltage level into a digital measurement signal, a controller to generate a digital control signal for the transistor depending on the digital measurement signal, and a DAC to convert the digital control signal into a first analog control signal. The non-linear second control loop is configured to generate a second analog control signal depending on the analog output voltage level. The second analog control signal is superimposed with the first analog control signal and the combined control signals are fed to the control input of the transistor.

    ELECTRONIC DEVICE
    5.
    发明申请
    ELECTRONIC DEVICE 有权

    公开(公告)号：US20220399886A1

    公开(公告)日：2022-12-15

    申请号：US17836181

    申请日：2022-06-09

    Applicant: Infineon Technologies AG

    Inventor： Mihail Jefremow ,  David Zipperstein ,  Juergen Schaefer ,  Holger Dienst ,  Markus Bichl ,  Ralph Mueller-Eschenbach ,  Arndt Voigtlaender

    IPC: H03K17/56 ,  H03M3/00

    Abstract: According to an example, an electronic device includes a component, a supply line providing a supply voltage, a transistor with a control input, a linear first control loop, and a non-linear second control loop. The transistor outputs an output voltage to the component depending on a signal applied to the control input. The linear first control loop includes an ADC to convert an analog output voltage level into a digital measurement signal, a controller to generate a digital control signal for the transistor depending on the digital measurement signal, and a DAC to convert the digital control signal into a first analog control signal. The non-linear second control loop is configured to generate a second analog control signal depending on the analog output voltage level. The second analog control signal is superimposed with the first analog control signal and the combined control signals are fed to the control input of the transistor.

    Non-linear inter-ADC calibration by time equidistant triggering
    9.
    发明授权
    Non-linear inter-ADC calibration by time equidistant triggering 有权

    公开(公告)号：US11621717B1

    公开(公告)日：2023-04-04

    申请号：US17519759

    申请日：2021-11-05

    Applicant: Infineon Technologies AG

    Inventor： Mihail Jefremow ,  Ralph Mueller-Eschenbach ,  Juergen Schaefer ,  Arndt Voigtlaender ,  David Zipperstein

    IPC: H03M1/10 ,  H03M1/50 ,  H03M1/46 ,  H03M1/12

    Abstract: A calibration circuit, including: a first analog-to-digital converter (ADC) configured to sample a nonlinear reference signal continuously at an equidistant sampling rate to generate a reference sampled signal; a trigger timer configured to generate trigger signals; a second ADC configured to sample a point of each of the nonlinear reference signal and repeated versions of the nonlinear reference signal in response to the respective trigger signals at equidistantly increasing delays, to generate a device-under-test (DUT) sampled voltage; and processing circuitry configured to estimate a differential nonlinearity (DNL) of the DUT sampled signal, estimate a DNL of the reference sampled signal, and compare the estimated DNL of the DUT sampled signal with the estimated DNL of the reference sampled signal, to generate a DNL performance indication signal of the second ADC.

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