公开(公告)号：US20240111092A1

公开(公告)日：2024-04-04

申请号：US17956757

申请日：2022-09-29

Applicant: Intel Corporation

Inventor： Brandon C. MARIN ,  Gang DUAN ,  Jeremy D. ECTON ,  Suddhasattwa NAD ,  Srinivas V. PIETAMBARAM

IPC: G02B6/122 ,  G02B6/13

CPC classification number: G02B6/122 ,  G02B6/13

Abstract: Embodiments herein relate to systems, apparatuses, techniques for an optical waveguide that includes a plurality of pillar structures that are in an optical path between the optical waveguide and a PIC. In embodiments, the plurality of pillar structures form an evanescent coupling structure that increases the alignment tolerance between the PIC and the optical waveguide. In embodiments, an end of each of the plurality of pillar structures may include a mass of material, such as gold, silver, or copper, that light from the PIC interacts with in a Plasmon effect to focus the light on to the optical waveguide. Other embodiments may be described and/or claimed.

公开(公告)号：US20230092242A1

公开(公告)日：2023-03-23

申请号：US17507010

申请日：2021-09-17

Applicant: Intel Corporation

Inventor： Srinivas V. PIETAMBARAM ,  Sameer PAITAL ,  Kristof DARMAWIKARTA ,  Hiroki TANAKA ,  Brandon C. MARIN ,  Jeremy D. ECTON ,  Gang DUAN

IPC: H01L23/15 ,  H01L21/768

Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques directed to a glass core within a substrate in a package, with one or more through glass vias (TGV) that are filled with a conductive material to electrically couple a first side of the glass core with a second side of the glass layer opposite the first side. A pad, also of conductive material, is electrically and physically coupled with a first and/or second end of the conductive material of the TGV. A layer of dielectric material is between at least a portion of the pad and the surface of the glass core between the pad and the glass core during manufacturing, handling, and/or operation to facilitate a reduction of stress cracks in the glass core. Other embodiments may be described and/or claimed.

公开(公告)号：US20230079607A1

公开(公告)日：2023-03-16

申请号：US17473099

申请日：2021-09-13

Applicant: Intel Corporation

Inventor： Jeremy D. ECTON ,  Brandon C. MARIN ,  Srinivas V. PIETAMBARAM ,  Suddhasattwa NAD ,  Leonel ARANA

IPC: H01L23/538 ,  H01L23/00 ,  H01L23/15 ,  H01L21/48 ,  H01L21/683

Abstract: Embodiments disclosed herein include electronic packages and methods of assembling such electronic packages. In an embodiment, an electronic package comprises a first layer comprising glass. In an embodiment, conductive pillars are formed through the first layer, and a buildup layer stack is on the first layer. In an embodiment, conductive routing is provided through the buildup layer stack. In an embodiment, a second layer is over a surface of the buildup layer stack opposite from the glass layer.

公开(公告)号：US20230077486A1

公开(公告)日：2023-03-16

申请号：US17473111

申请日：2021-09-13

Applicant: Intel Corporation

Inventor： Jeremy D. ECTON ,  Brandon C. MARIN ,  Aleksandar ALEKSOV ,  Srinivas V. PIETAMBARAM ,  Leonel ARANA

IPC: H01L23/495 ,  H01L23/48 ,  H01L23/15

Abstract: Embodiments disclosed herein include a package substrate. In an embodiment, the package substrate comprises a core with a first surface and a second surface, where the core comprises glass. In an embodiment, a first via is through the core, where the first via comprise a conductive material, and a film over the first surface of the core, where the film is an adhesive. In an embodiment, a second via is through the film, where the second via comprises a conductive material, where the second via contacts the first via. In an embodiment, a centerline of the second via is aligned with a centerline of the first via. In an embodiment, a buildup layer is over the film.

公开(公告)号：US20220196914A1

公开(公告)日：2022-06-23

申请号：US17131678

申请日：2020-12-22

Applicant: Intel Corporation

Inventor： Jeremy D. ECTON ,  Hiroki TANAKA ,  Brandon C. MARIN ,  Srinivas V. PIETAMBARAM ,  Gang DUAN ,  Bai NIE ,  Haobo CHEN ,  Zhichao ZHANG ,  Sai VADLAMANI ,  Aleksandar ALEKSOV

IPC: G02B6/12 ,  H01L23/48 ,  G02B6/02 ,  H01L25/065

Abstract: Embodiments disclosed herein include electronic packages and methods of forming such structures. In an embodiment, an electronic package comprises a package substrate, a first die over the package substrate, and a second die over the package substrate. In an embodiment, the electronic package further comprises an optical waveguide on the package substrate. In an embodiment, a first end of the optical waveguide is below the first die and a second end of the optical waveguide is below the second die. In an embodiment, the optical waveguide communicatively couples the first die to the second die.

公开(公告)号：US20200373261A1

公开(公告)日：2020-11-26

申请号：US16421989

申请日：2019-05-24

Applicant: Intel Corporation

Inventor： Brandon C. MARIN ,  Jeremy D. ECTON ,  Aleksandar ALEKSOV ,  Kristof DARMAWIKARTA ,  Yonggang LI ,  Dilan SENEVIRATNE

IPC: H01L23/66 ,  H01P7/10 ,  H01P3/16 ,  H01L21/768 ,  H01P11/00 ,  H01L21/288

Abstract: A filter structure comprises a first dielectric buildup film. A second dielectric buildup film is over the first dielectric buildup film, the second dielectric buildup film including a metallization catalyst. A trench is in the second dielectric buildup film. A metal is selectively plated to sidewalls of the trench based at least in part on the metallization catalyst. A low-loss buildup film is over the metal that substantially fills the trench.

公开(公告)号：US20200373157A1

公开(公告)日：2020-11-26

申请号：US16419426

申请日：2019-05-22

Applicant: Intel Corporation

Inventor： Jeremy D. ECTON ,  Brandon C. MARIN ,  Andrew J. BROWN ,  Dilan SENEVIRATNE

IPC: H01L21/02 ,  H01L49/02 ,  H01L23/532 ,  H01L21/768

Abstract: A thin-film insulator comprises a first electrode over a substrate. A photo up-converting material is over the first electrode. A cured photo-imageable dielectric (PID) containing a high-k filler material is over the photo up-converting material, wherein the cured PID is less than 4 μm in thickness, and a second electrode is over the cured PID.