公开(公告)号：US08115564B2

公开(公告)日：2012-02-14

申请号：US12839635

申请日：2010-07-20

申请人： Michael A. Kost

发明人： Michael A. Kost

IPC分类号： H03K7/08

CPC分类号： H03K7/08 ,  H03F1/305 ,  H03F3/2171 ,  H03K5/1515

摘要： Systems and methods for minimizing startup transients in digital audio controllers that may result in audible artifacts in the output of an audio amplification system. One embodiment comprises a digital PWM amplifier that includes a mechanism for controlling the amount of dead time in the audio output signal. When the amplifier starts up, the PWM signals provided to the output stage are simultaneously deasserted (i.e., there is dead time) for most of each switch period. The amount of dead time is gradually reduced over a series of switch periods until a nominal operating amount of dead time in each switch period is reached. Thus, the PWM signals are slowly ramped up from having a very large percentage of dead time (e.g., nearly 100%) to having a very small percentage of dead time (e.g., 1-2% to prevent shoot-through.)

摘要翻译： 用于最小化数字音频控制器中的启动瞬变的系统和方法，其可能导致音频放大系统的输出中的可听见的伪影。 一个实施例包括数字PWM放大器，其包括用于控制音频输出信号中的死区时间量的机构。 当放大器启动时，提供给输出级的PWM信号在每个开关周期的大部分时间同时被断言（即，存在死区时间）。 在一系列开关周期内死区时间逐渐减少，直到达到每个开关周期内的死区时间的标称操作量。 因此，PWM信号从死区时间的很大百分比（例如近100％）缓慢上升到具有非常小百分比的死区时间（例如，1-2％以防止直通）。

公开(公告)号：US20090169022A1

公开(公告)日：2009-07-02

申请号：US12346211

申请日：2008-12-30

申请人： Michael A. Kost

发明人： Michael A. Kost

IPC分类号： H04R29/00 ,  H03F99/00

CPC分类号： H03F3/2173 ,  H03F1/523 ,  H03F3/185 ,  H04R3/007

摘要： Systems and methods for implementing over-current protection in amplifiers are provided, including systems, methods and devices for specifying a clip level at which to clip an audio signal in response to an over-current condition being detected. In an embodiment, the clip level is reduced while the over-current condition is being detected. Once the over-current condition is no longer detected, the clip level is maintained for a specified period before allowing the clip level to be increased. In an embodiment, the specified period, for which the clip level is maintained before the clip level is allowed to be increased, starts when the over-current condition is no longer detected, and ends when each of N immediately preceding sample(s) of the audio signal are not clipped to the clip level, where N is an integer, and N≧1. After an over-current condition is no longer detected, and after the clip level has been maintained for the specified period, the clip level can be increased if an over-current condition is not detected for a sample and the clip level is below a specified maximum clip level.

摘要翻译： 提供了用于在放大器中实现过电流保护的系统和方法，包括系统，方法和装置，用于指定针对正在检测的过电流状况来剪辑音频信号的剪辑电平。 在一个实施例中，在检测到过电流条件的同时，减少电平。 一旦不再检测到过电流条件，则在允许增加剪辑级别之前，将剪辑级别保持指定的时间段。 在一个实施例中，在不再检测到过电流状态的情况下，在允许增加剪辑级别之前保持剪辑级别的指定时段开始，并且当N个紧邻在前的样本 音频信号不会剪辑到剪辑级别，其中N是整数，N> = 1。 在不再检测到过电流状态之后，并且在剪辑级别已经维持指定的时间段之后，如果对于样本未检测到过电流状况并且剪辑级别低于指定的范围，则可以增加剪辑级别 最大剪辑级别。

公开(公告)号：US07436256B2

公开(公告)日：2008-10-14

申请号：US11687455

申请日：2007-03-16

申请人： Michael A. Kost

发明人： Michael A. Kost

IPC分类号： H03F3/38

CPC分类号： H03F3/217

摘要： Systems and methods for preventing violations of minimum pulse width requirements that may cause damage to PWM amplifiers. One embodiment comprises a digital PWM amplifier that includes shutdown circuitry which is configured to identify blockout intervals during which deassertion of the PWM signals would cause the generation of below-minimum-width pulses in the signals. Each blockout interval may, for example, begin 1 minimum pulse width before and end 1 minimum pulse width after a rising/falling edge the PWM signals. If a shutdown signal is asserted (or deasserted) during one of the blockout intervals, the PWM signals are deasserted (or reasserted) at the end of the blockout interval.

摘要翻译： 防止可能造成PWM放大器损坏的最小脉冲宽度要求的系统和方法。 一个实施例包括数字PWM放大器，该数字PWM放大器包括关断电路，其被配置为识别阻塞间隔，在此间隔期间PWM信号的取消导致信号中产生低于最小宽度的脉冲。 每个阻塞间隔可以例如在PWM信号的上升沿/下降沿之后开始1个最小脉冲宽度和结束1个最小脉冲宽度。 如果在一个阻塞间隔期间关闭信号被断言（或无效），则在阻塞间隔结束时，PWM信号被置为无效（或重新置为空闲）。

公开(公告)号：US20070176815A1

公开(公告)日：2007-08-02

申请号：US11669305

申请日：2007-01-31

申请人： Michael A. Kost

发明人： Michael A. Kost

IPC分类号： H03M1/12

CPC分类号： H03F3/217 ,  H03F2200/03 ,  H03F2200/351 ,  H03M3/37 ,  H03M3/506

摘要： Systems and methods for minimizing delay in a feedback path. In one embodiment, an analog-to-digital feedback path includes an analog-to-digital converter (ADC) configured to receive and digitize an analog signal such as an amplifier output to produce a serial digital output. A serial interface receives and parallelizes the serial digital output to produce a parallel data words that are provided to a processing unit such as a decimator. The processing unit processes the data words to produce a digital feedback signal which can then be used to modify an input signal, such as a digital audio input to the amplifier. A delay minimization subsystem is implemented in the feedback path to monitor a delay between generation of parallel data words by the serial interface and consumption of the parallel data words by the first processing unit. The delay minimization mechanism may be implemented in multiple channels of the feedback path.

摘要翻译： 用于最小化反馈路径延迟的系统和方法。 在一个实施例中，模数 - 数字反馈路径包括被配置为接收和数字化模拟信号（例如放大器输出）以产生串行数字输出的模拟 - 数字转换器（ADC）。 串行接口接收和并行串行数字输出，以产生提供给诸如抽取器之类的处理单元的并行数据字。 处理单元处理数据字以产生数字反馈信号，该数字反馈信号然后可用于修改输入信号，例如输入到放大器的数字音频。 在反馈路径中实现延迟最小化子系统，以监视由串行接口产生并行数据字之间的延迟和第一处理单元对并行数据字的消耗。 延迟最小化机制可以在反馈路径的多个通道中实现。

公开(公告)号：US09351356B2

公开(公告)日：2016-05-24

申请号：US13486947

申请日：2012-06-01

申请人： Zhaohui He ,  Robert T. Grisamore ,  Michael A. Kost

发明人： Zhaohui He ,  Robert T. Grisamore ,  Michael A. Kost

IPC分类号： H05B33/08

CPC分类号： H05B33/0815 ,  Y02B20/346

摘要： An electronic system includes controller to control a switching power converter to provide power to a load. To control the amount of power provided to the load, in at least one embodiment, the controller senses a current value representing a current in the switching power converter and detects when the current value reaches a target peak value. However, due to delays in the controller and/or the switching power converter, the detected target peak value will not be the actual current peak value generated by the switching power converter. In at least one embodiment, the controller adjusts the detected target peak value with a post-detection delay compensation factor to generate a delay compensated current value that more accurately represents an actual peak current value associated with the current in the switching power converter.

摘要翻译： 电子系统包括控制器以控制开关功率转换器以向负载提供电力。 为了控制提供给负载的功率量，在至少一个实施例中，控制器检测表示开关功率转换器中的电流的电流值，并检测当前值何时达到目标峰值。 然而，由于控制器和/或开关功率转换器的延迟，检测到的目标峰值将不是由开关功率转换器产生的实际电流峰值。 在至少一个实施例中，控制器利用检测后延迟补偿因子调整检测到的目标峰值，以产生更准确地表示与开关功率转换器中的电流相关联的实际峰值电流值的延迟补偿电流值。

公开(公告)号：US20120299501A1

公开(公告)日：2012-11-29

申请号：US13488580

申请日：2012-06-05

申请人： Michael A. Kost ,  Mauro L. Gaetano ,  John L. Melanson

发明人： Michael A. Kost ,  Mauro L. Gaetano ,  John L. Melanson

IPC分类号： H05B37/02

CPC分类号： H05B33/0815 ,  H05B33/0824 ,  Y02B20/346

摘要： In at least one embodiment, a controller allows triac-based dimmer to properly function and dim a load whose voltage is regulated by a switching power converter. In at least one embodiment, the switching power converter includes a switch to control voltage conversion of an input voltage to the switching power converter, wherein phase delays are introduced in the input voltage by a triac-based dimmer during a dimming period. In at least one embodiment, the controller is configured to control the switch of the switching power converter to establish an input resistance of the switching power converter during a dimming portion of the input voltage, wherein the input resistance allows the triac-based dimmer to phase modulate a supply voltage to the dimmer so that an output voltage of the dimmer has a substantially uninterrupted phase delay during each half-cycle of the supply voltage during the dimming period.

摘要翻译： 在至少一个实施例中，控制器允许基于triac的调光器正确地对其电压由开关功率转换器调节的负载进行功能和调光。 在至少一个实施例中，开关功率转换器包括用于控制输入电压到开关功率转换器的电压转换的开关，其中在调光期间通过基于三端双向可控硅的调光器在输入电压中引入相位延迟。 在至少一个实施例中，控制器被配置为控制开关功率转换器的开关，以在输入电压的调光部分期间建立开关功率转换器的输入电阻，其中输入电阻允许基于triac的调光器相位 调制到调光器的电源电压，使得调光器的输出电压在调光期间的电源电压的每个半周期期间具有基本上不间断的相位延迟。

公开(公告)号：US20120044018A1

公开(公告)日：2012-02-23

申请号：US13284723

申请日：2011-10-28

申请人： Michael A. Kost

发明人： Michael A. Kost

IPC分类号： H03F3/38

CPC分类号： H03F3/2173 ,  H03F1/523 ,  H03F3/185 ,  H04R3/007

摘要： Systems and methods for implementing over-current protection include reducing a clip level while an over-current condition is being detected. Once the over-current condition is no longer detected, the clip level is maintained for a specified period before allowing the clip level to be increased. In an embodiment, the specified period, for which the clip level is maintained before the clip level is allowed to be increased, starts when the over-current condition is no longer detected, and ends when each of N immediately preceding sample(s) of the audio signal are not clipped to the clip level, where N is an integer ≧1. After an over-current condition is no longer detected, and after the clip level has been maintained for the specified period, the clip level can be increased if an over-current condition is not detected for a sample and the clip level is below a specified maximum clip level.

摘要翻译： 用于实现过电流保护的系统和方法包括在检测到过电流状况的同时减小钳位电平。 一旦不再检测到过电流条件，则在允许增加剪辑级别之前，将剪辑级别保持指定的时间段。 在一个实施例中，在不再检测到过电流状态的情况下，在允许增加剪辑级别之前保持剪辑级别的指定时段开始，并且当N个紧前面的样本 音频信号不被剪辑到剪辑级别，其中N是≥1的整数。 在不再检测到过电流状态之后，并且在剪辑级别已经维持指定的时间段之后，如果对于样本未检测到过电流状况并且剪辑级别低于指定的范围，则可以增加剪辑级别 最大剪辑级别。

公开(公告)号：US20100253305A1

公开(公告)日：2010-10-07

申请号：US12781669

申请日：2010-05-17

申请人： John L. Melanson ,  Michael A. Kost

发明人： John L. Melanson ,  Michael A. Kost

IPC分类号： G05F1/46

CPC分类号： H03K7/08 ,  H02M1/4225 ,  H02M1/44 ,  Y02B70/126

摘要： Power control systems generate electromagnetic interference (EMI). In at least one embodiment, a power control system includes a switching power converter and a controller that utilizes a spread spectrum strategy to reduce peak EMI values of the power control system. The controller generates a power regulation, switch control signal to control an input voltage to output voltage conversion by the switching power converter. The controller modulates the period of the control signal in accordance with the spread spectrum strategy. The spread spectrum strategy is an intentional plan to spread the spectrum of the control signal to reduce peak EMI values, and, thus, reduce the potential for degradation in performance, a malfunction, or failure of an electronic circuit caused by the EMI. The controller also modulates a pulse width of the switch control signal in response to modulation of the period of the control signal to provide power factor correction.

摘要翻译： 电源控制系统产生电磁干扰（EMI）。 在至少一个实施例中，功率控制系统包括开关功率转换器和利用扩展频谱策略来降低功率控制系统的峰值EMI值的控制器。 控制器产生功率调节，开关控制信号，以控制输入电压，由开关电源转换器输出电压转换。 控制器根据扩频策略调制控制信号的周期。 扩频策略是扩展控制信号的频谱以降低EMI值的有意图，从而降低由EMI引起的性能下降，故障或电子电路故障的可能性。 控制器还响应于控制信号的周期的调制来调制开关控制信号的脉冲宽度，以提供功率因数校正。

公开(公告)号：US07791427B2

公开(公告)日：2010-09-07

申请号：US11847449

申请日：2007-08-30

申请人： Michael A. Kost

发明人： Michael A. Kost

IPC分类号： H03K7/08

CPC分类号： H03K7/08 ,  H03F1/305 ,  H03F3/2171 ,  H03K5/1515

摘要： Systems and methods for minimizing startup transients in digital audio controllers that may result in audible artifacts in the output of an audio amplification system. One embodiment comprises a digital PWM amplifier that includes a mechanism for controlling the amount of dead time in the audio output signal. When the amplifier starts up, the PWM signals provided to the output stage are simultaneously deasserted (i.e., there is dead time) for most of each switch period. The amount of dead time is gradually reduced over a series of switch periods until a nominal operating amount of dead time in each switch period is reached. Thus, the PWM signals are slowly ramped up from having a very large percentage of dead time (e.g., nearly 100%) to having a very small percentage of dead time (e.g., 1-2% to prevent shoot-through.)

摘要翻译： 用于最小化数字音频控制器中的启动瞬变的系统和方法，其可能导致音频放大系统的输出中的可听见的伪影。 一个实施例包括数字PWM放大器，其包括用于控制音频输出信号中的死区时间量的机构。 当放大器启动时，提供给输出级的PWM信号在每个开关周期的大部分时间同时被断言（即，存在死区时间）。 在一系列开关周期内死区时间逐渐减少，直到达到每个开关周期内的死区时间的标称操作量。 因此，PWM信号从死区时间的很大百分比（例如近100％）缓慢上升到具有非常小百分比的死区时间（例如，1-2％以防止直通）。

公开(公告)号：US07362254B2

公开(公告)日：2008-04-22

申请号：US11669305

申请日：2007-01-31

申请人： Michael A. Kost

发明人： Michael A. Kost

IPC分类号： H03M1/12

CPC分类号： H03F3/217 ,  H03F2200/03 ,  H03F2200/351 ,  H03M3/37 ,  H03M3/506

摘要： Systems and methods for minimizing delay in a feedback path. In one embodiment, an analog-to-digital feedback path includes an analog-to-digital converter (ADC) configured to receive and digitize an analog signal such as an amplifier output to produce a serial digital output. A serial interface receives and parallelizes the serial digital output to produce a parallel data words that are provided to a processing unit such as a decimator. The processing unit processes the data words to produce a digital feedback signal which can then be used to modify an input signal, such as a digital audio input to the amplifier. A delay minimization subsystem is implemented in the feedback path to monitor a delay between generation of parallel data words by the serial interface and consumption of the parallel data words by the first processing unit. The delay minimization mechanism may be implemented in multiple channels of the feedback path.

摘要翻译： 用于最小化反馈路径延迟的系统和方法。 在一个实施例中，模数 - 数字反馈路径包括被配置为接收和数字化模拟信号（例如放大器输出）以产生串行数字输出的模拟 - 数字转换器（ADC）。 串行接口接收和并行串行数字输出，以产生提供给诸如抽取器之类的处理单元的并行数据字。 处理单元处理数据字以产生数字反馈信号，该数字反馈信号然后可用于修改输入信号，例如输入到放大器的数字音频。 在反馈路径中实现延迟最小化子系统，以监视由串行接口产生并行数据字之间的延迟和第一处理单元对并行数据字的消耗。 延迟最小化机制可以在反馈路径的多个通道中实现。