Abstract:
The present invention is a set of layered probes that make electrical contact to a device under test. The layered probes are disposed within openings of at least one guide plate. The guide plate surrounds the probes via the openings.
Abstract:
Improved probing of closely spaced contact pads is provided by an array of vertical probes having all of the probe tips aligned along a single contact line, while the probe bases are arranged in an array having two or more rows parallel to the contact line. With this arrangement of probes, the probe base thickness can be made greater than the contact pad spacing along the contact line, thereby advantageously increasing the lateral stiffness of the probes. The probe tip thickness is less than the contact pad spacing, so probes suitable for practicing the invention have a wide base section and a narrow tip section.
Abstract:
Method and apparatus using a retention arrangement with a potting enclosure for holding a plurality of probes by their retention portions, the probes being of the type having contacting tips for establishing electrical contact with pads or bumps of a device under test (DUT) to perform an electrical test. The retention arrangement has a top plate with top openings for the probes, a bottom plate with bottom openings for the probes, the plates being preferably made of ceramic with laser-machined openings, and a potting enclosure between the plates for admitting a potting agent that upon curing pots the retaining portions of the probes. In some embodiments a spacer is positioned between the top and bottom plates for defining the potting enclosure. Alternatively, the retention arrangement has intermediate plates located in the potting enclosure and having probe guiding openings to guide the probes.
Abstract:
Method and apparatus using a retention arrangement with a potting enclosure for holding a plurality of probes by their retention portions, the probes being of the type having contacting tips for establishing electrical contact with pads or bumps of a device under test (DUT) to perform an electrical test. The retention arrangement has a top plate with top openings for the probes, a bottom plate with bottom openings for the probes, the plates being preferably made of ceramic with laser-machined openings, and a potting enclosure between the plates for admitting a potting agent that upon curing pots the retaining portions of the probes. In some embodiments a spacer is positioned between the top and bottom plates for defining the potting enclosure. Alternatively, the retention arrangement has intermediate plates located in the potting enclosure and having probe guiding openings to guide the probes.
Abstract:
An interconnect assembly includes a number of interconnect stages combined in a carrier structure. Each interconnect stage includes at least two contact sets having an upwards pointing cantilever contact and a downwards pointing cantilever contact. The cantilever contacts are attached to the carrier structure and are arranged around openings in the carrier structure such that the downward pointing cantilevers may reach through the carrier structure. Each contact set defines an independent conductive path between a single pair of opposing chip and test apparatus contacts such that multiple conductive paths are available for each interconnect stage for increased transmission reliability and reduced resistance. The cantilever contacts have a meandering contour and are either combined in symmetrical pairs at their respective tips or are free pivoting. The meandering contour provides a maximum deflectable cantilever length within an available footprint defined by the pitch of the tested chip.
Abstract:
An interconnect assembly includes a number of interconnects combined in a preferably planar dielectric carrier frame having resilient portions acting as spring members in conjunction with their respective interconnect's rotational displacement during operational contacting. Each interconnect is fabricated as a see-saw structure pivoting around a rotation axis that substantially coincides with a symmetry plane of the torsion features provided by the resilient portion. The torsion features protrude towards and adhere to a central portion of the see-saw interconnect such that an angular movement of the interconnect is resiliently opposed by the torsion feature and the resilient portion. The torsion features and interconnects may be independently optimized to provide the interconnect with maximum stiffness and a maximum deflection at same time.
Abstract:
An interconnect assembly includes a number of interconnects combined in a preferably planar dielectric carrier frame having resilient portions acting as spring members in conjunction with their respective interconnect's rotational displacement during operational contacting. Each interconnect is fabricated as a see-saw structure pivoting around a rotation axis that substantially coincides with a symmetry plane of the torsion features provided by the resilient portion. The torsion features protrude towards and adhere to a central portion of the see-saw interconnect such that an angular movement of the interconnect is resiliently opposed by the torsion feature and the resilient portion. The torsion features and interconnects may be independently optimized to provide the interconnect with maximum stiffness and a maximum deflection at same time.
Abstract:
An interconnect assembly includes a number of interconnects combined in a preferably planar dielectric carrier frame having resilient portions acting as spring members in conjunction with their respective interconnect's rotational displacement during operational contacting. Each interconnect is fabricated as a see-saw structure pivoting around a rotation axis that substantially coincides with a symmetry plane of the torsion features provided by the resilient portion. The torsion features protrude towards and adhere to a central portion of the see-saw interconnect such that an angular movement of the interconnect is resiliently opposed by the torsion feature and the resilient portion. The torsion features and interconnects may be independently optimized to provide the interconnect with maximum stiffness and a maximum deflection at same time.
Abstract:
A space transformer made up of a primary structure that is fabricated from semiconductor body for retaining beam probes used for contacting the pads of a circuit or device under test. The primary structure is part of the space transformer and has vias that hold the beam probes, and a ceramic support structure to provide sufficient stiffness before bonding it to a secondary structure of the space transformer. The fabrication of the primary structure and its embedding within the secondary structure is performed in a manner analogous to the fabrication of circuit chips and its embedding within the packaging. As a result, down scaling in chip fabrication can be correspondingly applied to the fabrication of space transformers.