公开(公告)号：US20220091772A1

公开(公告)日：2022-03-24

申请号：US17410674

申请日：2021-08-24

Applicant: KIOXIA CORPORATION

Inventor： Toshio FUJISAWA ,  Tomoya SANUKI ,  Hitomi TANAKA ,  Takeshi ISHIHARA ,  Yasuhito YOSHIMIZU

IPC: G06F3/06

Abstract: According to one embodiment, a memory system includes a non-volatile semiconductor memory with a plurality of blocks. A controller in the system controls the writing of data to the non-volatile semiconductor memory and includes a host I/F control interface to receive write command information including file allocation information indicating a location for write data, a file information management unit to assign an erasure level to a file and output a file identifier in which a file name, a file size, and the erasure level of the file are combined, and a flash translation layer unit to allocate each file on a single file per block basis based on the write command information and the file identifier.

公开(公告)号：US20210272946A1

公开(公告)日：2021-09-02

申请号：US17006378

申请日：2020-08-28

Applicant: KIOXIA CORPORATION

Inventor： Tomoya SANUKI ,  Toshio FUJISAWA ,  Hiroshi MAEJIMA ,  Takashi MAEDA

IPC: H01L25/18 ,  H01L23/00 ,  G11C16/10 ,  G11C16/26 ,  G11C16/30 ,  G06F3/06

Abstract: A semiconductor storage device includes a plurality of memory chips and a circuit chip. The plurality of memory chips and the circuit chip are stacked on each other. Each of the plurality of memory chips has a memory cell array that includes a plurality of memory cells. The circuit chip includes a data latch configured to store page data for writing or reading data into or from the memory cell array of each of the memory chips.

公开(公告)号：US20210149568A1

公开(公告)日：2021-05-20

申请号：US17121024

申请日：2020-12-14

Applicant: Kioxia Corporation

Inventor： Yasuhito YOSHIMIZU ,  Takashi FUKUSHIMA ,  Tatsuro HITOMI ,  Arata INOUE ,  Masayuki MIURA ,  Shinichi KANNO ,  Toshio FUJISAWA ,  Keisuke NAKATSUKA ,  Tomoya SANUKI

IPC: G06F3/06 ,  G06F12/1009 ,  G06F12/02

Abstract: According to one embodiment, a storage device includes a stage on which a semiconductor wafer can be mounted, wherein data is capable of being read from the semiconductor wafer or data is capable of being written to the semiconductor wafer. The storage device further includes a plurality of probe pins for reading or writing data, and a controller connected the probe pins. The semiconductor wafer includes electrodes connectable to the probe pins, a first memory area that can store user data, and a second memory area that can store identification information for identification of the semiconductor wafer and a check code for checking integrity of the identification information. The controller is capable of reading the identification information and the check code from the second memory area.