公开(公告)号：US20100055853A1

公开(公告)日：2010-03-04

申请号：US12617712

申请日：2009-11-12

申请人： Chih-Chun Yang ,  Ming-Yuan Huang ,  Han-Tu Lin ,  Chih-Hung Shih ,  Ta-Wen Liao ,  Kuo-Lung Fang ,  Chia-Chi Tsai

发明人： Chih-Chun Yang ,  Ming-Yuan Huang ,  Han-Tu Lin ,  Chih-Hung Shih ,  Ta-Wen Liao ,  Kuo-Lung Fang ,  Chia-Chi Tsai

IPC分类号： H01L21/336

CPC分类号： H01L27/1248 ,  H01L27/1288

摘要： A method for manufacturing a pixel structure is provided. A gate and a gate insulating layer are sequentially formed on a substrate. A semiconductor layer and a second metal layer are sequentially formed on the gate insulating layer. The semiconductor layer and the second metal layer are patterned to form a channel layer, a source and a drain by using a patterned photoresist layer formed thereon, wherein the source and drain are disposed on a portion of the channel layer. The gate, channel, source and drain form a thin film transistor. A passivation layer is formed on the patterned photoresist layer, the gate insulating layer and the thin film transistor. Then, the patterned photoresist layer is removed, such that the passivation layer thereon is removed simultaneously to form a patterned passivation layer and the drain is exposed. A pixel electrode is formed on the patterned passivation layer and the drain.

摘要翻译： 提供了一种用于制造像素结构的方法。 栅极和栅极绝缘层依次形成在基板上。 半导体层和第二金属层依次形成在栅极绝缘层上。 通过使用形成在其上的图案化光致抗蚀剂层，将半导体层和第二金属层图案化以形成沟道层，源极和漏极，其中源极和漏极设置在沟道层的一部分上。 栅极，沟道，源极和漏极形成薄膜晶体管。 在图案化的光致抗蚀剂层，栅极绝缘层和薄膜晶体管上形成钝化层。 然后，去除图案化的光致抗蚀剂层，使得其上的钝化层被同时去除以形成图案化的钝化层，并且漏极被暴露。 在图案化的钝化层和漏极上形成像素电极。

公开(公告)号：US20090191652A1

公开(公告)日：2009-07-30

申请号：US12081515

申请日：2008-04-17

申请人： Kuo-Lung Fang ,  Hsiang-Lin Lin ,  Chin-Yueh Liao

发明人： Kuo-Lung Fang ,  Hsiang-Lin Lin ,  Chin-Yueh Liao

IPC分类号： H01L27/02 ,  H01L21/70

CPC分类号： H01L29/458 ,  H01L27/124 ,  H01L27/1288

摘要： A pixel structure includes a scan line, a data line, an active element, a first passivation layer, a second passivation layer and a pixel electrode. The data line includes a first data metal segment and a second data metal layer. The active element includes a gate electrode, an insulating layer, a channel layer, a source and a drain. The channel layer is positioned on the insulating layer above the gate electrode. The source and the drain are positioned on the channel layer. The source is coupled to the data line. The first passivation layer and the second passivation layer cover the active element and form a first contact hole to expose a part of the drain. The second passivation layer covers a part edge of the drain. The pixel electrode is disposed across the second passivation layer and coupled to the drain via the first contact hole.

摘要翻译： 像素结构包括扫描线，数据线，有源元件，第一钝化层，第二钝化层和像素电极。 数据线包括第一数据金属段和第二数据金属层。 有源元件包括栅电极，绝缘层，沟道层，源极和漏极。 沟道层位于栅电极上方的绝缘层上。 源极和漏极位于沟道层上。 源耦合到数据线。 第一钝化层和第二钝化层覆盖有源元件并形成第一接触孔以暴露漏极的一部分。 第二钝化层覆盖漏极的一部分边缘。 像素电极跨越第二钝化层设置并且经由第一接触孔耦合到漏极。

公开(公告)号：US20090148972A1

公开(公告)日：2009-06-11

申请号：US12105279

申请日：2008-04-18

申请人： Kuo-Lung Fang ,  Chih-Chun Yang ,  Ming-Yuan Huang ,  Han-Tu Lin ,  Chih-Hung Shih ,  Ta-Wen Liao ,  Shiun-Chang Jan ,  Chia-Chi Tsai

发明人： Kuo-Lung Fang ,  Chih-Chun Yang ,  Ming-Yuan Huang ,  Han-Tu Lin ,  Chih-Hung Shih ,  Ta-Wen Liao ,  Shiun-Chang Jan ,  Chia-Chi Tsai

IPC分类号： H01L21/00

CPC分类号： H01L27/1248 ,  H01L27/1255 ,  H01L27/1288

摘要： A method for fabricating a pixel structure includes following steps. First, a substrate is provided. Next, a first conductive layer is formed on the substrate. Next, a first shadow mask is disposed over the first conductive layer. Next, a laser is applied through the first shadow mask to irradiate the first conductive layer to form a gate. Next, a gate dielectric layer is formed on the substrate to cover the gate. After that, a channel layer, a source and a drain are simultaneously formed on the gate dielectric layer over the gate, wherein the gate, the channel layer, the source and the drain together form a thin film transistor. A patterned passivation layer is formed on the thin film transistor and the patterned passivation layer exposes a part of the drain. Furthermore, a pixel electrode electrically connecting to the drain is formed.

摘要翻译： 一种用于制造像素结构的方法包括以下步骤。 首先，提供基板。 接下来，在基板上形成第一导电层。 接下来，在第一导电层上设置第一荫罩。 接下来，通过第一荫罩施加激光以照射第一导电层以形成栅极。 接下来，在基板上形成栅电介质层以覆盖栅极。 之后，沟道层，源极和漏极同时形成在栅极上的栅极电介质层上，其中栅极，沟道层，源极和漏极一起形成薄膜晶体管。 图案化的钝化层形成在薄膜晶体管上，并且图案化的钝化层露出一部分漏极。 此外，形成电连接到漏极的像素电极。

公开(公告)号：US08426894B2

公开(公告)日：2013-04-23

申请号：US13163780

申请日：2011-06-20

申请人： Kuo-Lung Fang ,  Hsiang-Lin Lin ,  Chin-Yueh Liao

发明人： Kuo-Lung Fang ,  Hsiang-Lin Lin ,  Chin-Yueh Liao

IPC分类号： H01L21/00 ,  H01L21/84 ,  H01L27/118 ,  H01L23/52

CPC分类号： H01L29/458 ,  H01L27/124 ,  H01L27/1288

摘要： A pixel structure includes a scan line, a data line, an active element, a first passivation layer, a second passivation layer and a pixel electrode. The data line includes a first data metal segment and a second data metal layer. The active element includes a gate electrode, an insulating layer, a channel layer, a source and a drain. The channel layer is positioned on the insulating layer above the gate electrode. The source and the drain are positioned on the channel layer. The source is coupled to the data line. The first passivation layer and the second passivation layer cover the active element and form a first contact hole to expose a part of the drain. The second passivation layer covers a part edge of the drain. The pixel electrode is disposed across the second passivation layer and coupled to the drain via the first contact hole.

摘要翻译： 像素结构包括扫描线，数据线，有源元件，第一钝化层，第二钝化层和像素电极。 数据线包括第一数据金属段和第二数据金属层。 有源元件包括栅电极，绝缘层，沟道层，源极和漏极。 沟道层位于栅电极上方的绝缘层上。 源极和漏极位于沟道层上。 源耦合到数据线。 第一钝化层和第二钝化层覆盖有源元件并形成第一接触孔以暴露漏极的一部分。 第二钝化层覆盖漏极的一部分边缘。 像素电极跨越第二钝化层设置并且经由第一接触孔耦合到漏极。

公开(公告)号：US08283188B2

公开(公告)日：2012-10-09

申请号：US13220693

申请日：2011-08-30

申请人： Kuo-Lung Fang ,  Chien-Sen Weng ,  Chih-Wei Chao

发明人： Kuo-Lung Fang ,  Chien-Sen Weng ,  Chih-Wei Chao

IPC分类号： H01L21/00

CPC分类号： H01L33/387 ,  H01L33/382 ,  H01L33/44

摘要： A method for fabricating a light emitting diode chip is provided. Firstly, a semiconductor device layer is formed on a substrate. Afterwards, a current spreading layer is formed on a portion of the semiconductor device layer. Then, a current blocking layer and a passivation layer are formed on a portion of the semiconductor device layer not covered by the current spreading layer. Finally, a first electrode is formed on the current blocking layer and the current spreading layer. Moreover, a second electrode is formed on the semiconductor device layer.

摘要翻译： 提供一种制造发光二极管芯片的方法。 首先，在基板上形成半导体器件层。 之后，在半导体器件层的一部分上形成电流扩散层。 然后，在未被电流扩展层覆盖的半导体器件层的一部分上形成电流阻挡层和钝化层。 最后，在电流阻挡层和电流扩展层上形成第一电极。 此外，在半导体器件层上形成第二电极。

公开(公告)号：US08101440B2

公开(公告)日：2012-01-24

申请号：US13220694

申请日：2011-08-30

申请人： Kuo-Lung Fang ,  Chien-Sen Weng ,  Chih-Wei Chao

发明人： Kuo-Lung Fang ,  Chien-Sen Weng ,  Chih-Wei Chao

IPC分类号： H01L33/00

CPC分类号： H01L33/387 ,  H01L33/382 ,  H01L33/44

摘要： A method for fabricating a light emitting diode chip is provided. Firstly, a semiconductor device layer is formed on a substrate. Afterwards, a current spreading layer is formed on a portion of the semiconductor device layer. Then, a current blocking layer and a passivation layer are formed on a portion of the semiconductor device layer not covered by the current spreading layer. Finally, a first electrode is formed on the current blocking layer and the current spreading layer. Moreover, a second electrode is formed on the semiconductor device layer.

公开(公告)号：US20110318856A1

公开(公告)日：2011-12-29

申请号：US13225568

申请日：2011-09-06

申请人： Shine-Kai Tseng ,  Han-Tu Lin ,  Shiun-Chang Jan ,  Kuo-Lung Fang

发明人： Shine-Kai Tseng ,  Han-Tu Lin ,  Shiun-Chang Jan ,  Kuo-Lung Fang

IPC分类号： H01L21/336

CPC分类号： H01L27/1248 ,  H01L27/1288

摘要： A method for fabricating a TFT array substrate includes following steps. A gate pattern and a first pad pattern are formed on a substrate. A gate insulation layer and a semiconductor layer covering the two patterns are sequentially formed. A patterned photoresist layer having different resist blocks is formed, and patterns and thicknesses of the resist blocks in different regions are adjusted. The semiconductor layer and the gate insulation layer above the first pad pattern are removed through performing an etching process and reducing a thickness of the patterned photoresist layer. After removing the patterned photoresist layer, a source pattern, a drain pattern, and a second pad pattern electrically connected to the first pad pattern are formed. A patterned passivation layer is formed on the gate insulation layer and has a second opening exposing the source pattern or the drain pattern and a third opening exposing the second pad pattern.

摘要翻译： 制造TFT阵列基板的方法包括以下步骤。 在基板上形成栅极图案和第一焊盘图案。 依次形成覆盖这两个图案的栅绝缘层和半导体层。 形成具有不同抗蚀剂块的图案化光致抗蚀剂层，并且调整不同区域中的抗蚀剂块的图案和厚度。 通过执行蚀刻工艺并减小图案化光致抗蚀剂层的厚度来去除第一焊盘图案上方的半导体层和栅极绝缘层。 在去除图案化的光致抗蚀剂层之后，形成电连接到第一焊盘图案的源图案，漏极图案和第二焊盘图案。 图案化的钝化层形成在栅极绝缘层上，并且具有暴露源图案或漏极图案的第二开口和暴露第二焊盘图案的第三开口。

公开(公告)号：US08043873B2

公开(公告)日：2011-10-25

申请号：US12398165

申请日：2009-03-04

申请人： Kuo-Lung Fang ,  Chien-Sen Weng ,  Chih-Wei Chao

发明人： Kuo-Lung Fang ,  Chien-Sen Weng ,  Chih-Wei Chao

IPC分类号： H01L33/00

CPC分类号： H01L33/387 ,  H01L33/382 ,  H01L33/44

摘要： A method for fabricating a light emitting diode chip is provided. Firstly, a semiconductor device layer is formed on a substrate. Afterwards, a current spreading layer is formed on a portion of the semiconductor device layer. Then, a current blocking layer and a passivation layer are formed on a portion of the semiconductor device layer not covered by the current spreading layer. Finally, a first electrode is formed on the current blocking layer and the current spreading layer. Moreover, a second electrode is formed on the semiconductor device layer.

摘要翻译： 提供一种制造发光二极管芯片的方法。 首先，在基板上形成半导体器件层。 之后，在半导体器件层的一部分上形成电流扩散层。 然后，在未被电流扩展层覆盖的半导体器件层的一部分上形成电流阻挡层和钝化层。 最后，在电流阻挡层和电流扩展层上形成第一电极。 此外，在半导体器件层上形成第二电极。

公开(公告)号：US20110241064A1

公开(公告)日：2011-10-06

申请号：US13159430

申请日：2011-06-14

申请人： Kuo-Lung Fang ,  Chien-Sen Weng ,  Chih-Wei Chao

发明人： Kuo-Lung Fang ,  Chien-Sen Weng ,  Chih-Wei Chao

IPC分类号： H01L33/36

CPC分类号： H01L33/145 ,  H01L33/387

摘要： A LED chip including a substrate, a semiconductor device layer, a current blocking layer, a current spread layer, a first electrode and a second electrode is provided. The semiconductor device layer is disposed on the substrate. The current blocking layer is disposed on a part of the semiconductor device layer and includes a current blocking segment and a current distribution adjusting segment. The current spread layer is disposed on a part of the semiconductor device layer and covers the current blocking layer. The first electrode is disposed on the current spread layer, wherein a part of the current blocking segment is overlapped with the first electrode. Contours of the current blocking segment and the first electrode are similar figures. Contour of the first electrode and is within contour of the current blocking segment. The current distribution adjusting segment is not overlapped with the first electrode.

摘要翻译： 提供了包括衬底，半导体器件层，电流阻挡层，电流扩散层，第一电极和第二电极的LED芯片。 半导体器件层设置在基板上。 电流阻挡层设置在半导体器件层的一部分上，并且包括电流阻挡段和电流分布调节段。 电流扩展层设置在半导体器件层的一部分上并覆盖电流阻挡层。 第一电极设置在电流扩展层上，其中电流阻挡段的一部分与第一电极重叠。 当前阻挡段和第一电极的轮廓是相似的图。 第一个电极的等高线并且在当前阻挡段的轮廓内。 电流分布调节段不与第一电极重叠。

公开(公告)号：US20110159623A1

公开(公告)日：2011-06-30

申请号：US13046584

申请日：2011-03-11

申请人： Kuo-Lung Fang ,  Chien-Sen Weng ,  Chih-Wei Chao

发明人： Kuo-Lung Fang ,  Chien-Sen Weng ,  Chih-Wei Chao

IPC分类号： H01L33/44

CPC分类号： H01L33/44 ,  H01L33/387 ,  Y10S438/951

摘要： A method for fabricating a light emitting diode chip is provided. In the method, a half-tone mask process, a gray-tone mask process or a multi-tone mask process is applied and combined with a lift-off process to further reduce process steps of the light emitting diode chip. In the present invention, some components may also be simultaneously formed by an identical process to reduce the process steps of the light emitting diode chip. Consequently, the fabricating method of the light emitting diode provided in the present invention reduces the cost and time for the fabrication of the light emitting diode.