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公开(公告)号：US20230061496A1
公开(公告)日：2023-03-02
申请号：US17463607
申请日：2021-09-01
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor： Po-Hao TSENG , Feng-Min LEE , Ming-Hsiu LEE
IPC: G11C15/04
Abstract: A memory cell for an analog content-addressable memory is provided. The memory cell includes an N-type transistor, a P-type transistor, and a current control circuit. The gate of the N-type transistor is configured to receive a first input signal. The gate of the P-type transistor is configured to receive a second input signal. The current control circuit is coupled to at least one of the N-type transistor and the P-type transistor. The current control circuit is configured to generate at least one passing current. When the input voltages of the first input signal and the second input signal are within a matching range, the N-type transistor and the P-type transistor are turned on, and the passing current is substantially a fixed current value. The matching range is related to the threshold voltages of the N-type transistor and the P-type transistor, and the fixed current value.
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32.发明申请公开(公告)号：US20230036141A1
公开(公告)日：2023-02-02
申请号：US17524771
申请日：2021-11-12
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor： Po-Hao TSENG , Feng-Min LEE , Ming-Hsiu Lee
Abstract: The application provides a content addressable memory (CAM) cell, a CAM memory device and an operation method thereof, and a method for searching and comparing data. The CAM cell includes a first flash memory cell having a first terminal for receiving a first search voltage; and a second flash memory cell having a first terminal for receiving a second search voltage, a second terminal of the first flash memory cell electrically connected to a second terminal of the second flash memory cell, wherein the first flash memory cell and the second flash memory cell are serially connected; and a storage data of the CAM cell is based on a combination of a plurality of threshold voltages of the first flash memory cell and the second flash memory cell.
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公开(公告)号：US20230022008A1
公开(公告)日：2023-01-26
申请号：US17380056
申请日：2021-07-20
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor： Ming-Hsiu LEE , Po-Hao TSENG , Yu-Hsuan LIN
IPC: G11C11/4096 , G11C11/408 , G11C11/4094
Abstract: A memory device for data searching and a data searching method thereof are provided. The data searching method includes the following steps. A searching word is received and then divided into a plurality of sections. The sections are encoded as a plurality of encoded sections, so that the encoded sections may correspond to a plurality of memory blocks in a memory array. The encoded sections are directed into the memory blocks to perform data comparisons and obtaining a respective result of data comparison. Thereafter, addresses of bit lines which match the searching word are obtained according to respective result of data comparison for each of memory block.
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公开(公告)号：US20220375526A1
公开(公告)日：2022-11-24
申请号：US17325244
申请日：2021-05-20
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor： Po-Hao TSENG , Feng-Min LEE
Abstract: An analog CAM and an operation method thereof are provided. The analog CAM includes a matching line, an analog CAM cell and a sense amplifier. Each of the at least one analog CAM includes a first floating gate device having a N type channel and a second floating gate device having a P type channel. A match range is set through programming the first floating gate device and the second floating gate device. The sense amplifier is connected to the matching line. If an inputting signal is within the match range, a voltage of the matching line is pulled down to be equal to or lower than a predetermined level. The sense amplifier outputs a match result if the voltage of the matching line is pulled down to a predetermined level.
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公开(公告)号：US20250131960A1
公开(公告)日：2025-04-24
申请号：US18991886
申请日：2024-12-23
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor： Po-Hao TSENG , Feng-Min LEE , Ming-Hsiu LEE
IPC: G11C15/04 , G11C11/404 , G11C16/04
Abstract: A TCAM comprises multiple first search lines, multiple second search lines, multiple memory cell strings, and one or more current sensing units coupled to the plurality of memory cell strings. Each memory cell string comprises multiple memory cells. Each memory cell string comprises at least four transistors serially connected as a NAND memory string, and two transistors of the at least four transistors form each memory cell. One, of the two transistors in each memory cell, coupled to one of the first search lines is a first transistor, and the other one, of the two transistors in each memory cell, coupled to one of the second search lines is a second transistor. The multiple first search lines are arranged consecutively, and the multiple second search lines are arranged consecutively.
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Patent Agency Ranking
公开(公告)号：US20240355394A1
公开(公告)日：2024-10-24
申请号：US18750178
申请日：2024-06-21
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor： Po-Hao TSENG , Feng-Min LEE , Yu-Hsuan LIN
CPC classification number: G11C16/102 , G11C16/08 , G11C16/26
Abstract: A memory device and associated operation method are provided. The operation method is applied to the memory device to determine whether a search input and in-memory data are matched. The memory device includes a memory array and a control circuit, and the memory array includes M*N memory cells. The operation method includes the following steps. A select voltage is applied to an n-th word line. A pass-through voltage is applied to (N−1) word lines. A first search voltage is applied to an m-th first bit-line, and a second search voltage is applied to an m-th second bit-line. An m-th first sensing current and an m-th second sensing current bit are selectively generated. Then, a sensing circuit in the control circuit generates a sensing circuit output. The sensing circuit output represents whether the m-th first sensing current and the m-th second sensing current are generated.
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公开(公告)号：US20240265966A1
公开(公告)日：2024-08-08
申请号：US18164657
申请日：2023-02-06
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor： Po-Hao TSENG , Feng-Min LEE , Yu-Hsuan LIN
IPC: G11C15/04
CPC classification number: G11C15/04
Abstract: An in-dynamic memory search device and an operation method thereof are provided. The in-dynamic memory search device includes at least one word line, at least two bit lines, at least one match line, at least one unit cell, at least two search lines, at least one pre-charge unit and at least one sense unit. The unit cell includes two storage elements and two search transistors. Each of the storage elements includes a write transistor and a read transistor. The write transistor is connected to the word line and one of the bit lines. The read transistor is connected to the write transistor and the match line. The search transistors are respectively connected to the read transistors. The search lines are respectively connected to the search transistors. The pre-charge unit is connected to the match line. The sense unit is connected to the match line.
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公开(公告)号：US20240090238A1
公开(公告)日：2024-03-14
申请号：US18519230
申请日：2023-11-27
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor： Feng-Min LEE , Erh-Kun LAI , Dai-Ying LEE , Yu-Hsuan LIN , Po-Hao TSENG , Ming-Hsiu LEE
CPC classification number: H10B63/845 , H10B61/22 , H10B63/34 , H10N50/01 , H10N70/066
Abstract: A memory device and a method for manufacturing the memory device are provided. The memory device includes a stack and a plurality of memory strings. The stack is disposed on the substrate, and the stack includes a plurality of conductive layers and a plurality of insulating layers alternately stacked. The memory strings pass through the stack along a first direction, wherein a first memory string in the memory strings includes a first conductive pillar and a second conductive pillar, a channel layer, and a memory structure. The first conductive pillar and the second conductive pillar respectively extend along the first direction and are separated from each other. The channel layer is disposed between the first conductive pillar and the second conductive pillar. The memory structure surrounds the second conductive pillar, and the memory structure includes a resistive memory material.
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39.发明公开公开(公告)号：US20230410904A1
公开(公告)日：2023-12-21
申请号：US18459461
申请日：2023-09-01
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor： Yu-Hsuan LIN , Po-Hao TSENG
CPC classification number: G11C15/046 , G11C7/14
Abstract: The application provides a content addressable memory (CAM) memory device, a CAM cell and a method for searching and comparing data thereof. The CAM device includes: a plurality of CAM cells; and an electrical characteristic detection circuit coupled to the CAM cells; wherein in data searching, a search data is compared with a storage data stored in the CAM cells, the CAM cells generate a plurality of memory cell currents, the electrical characteristic detection circuit detects the memory cell currents to generate a plurality of sensing results, or the electrical characteristic detection circuit detects a plurality of match line voltages on a plurality of match lines coupled to the CAM cells to generate the plurality of search results; and the storage data is a single-bit multi-level storage data and/or the search data is a single-bit multi-level search data.
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公开(公告)号：US20230368842A1
公开(公告)日：2023-11-16
申请号：US18354706
申请日：2023-07-19
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor： Po-Hao TSENG , Feng-Min LEE , Ming-Hsiu LEE
IPC: G11C15/04
CPC classification number: G11C15/046
Abstract: A memory cell for an analog content-addressable memory is provided. The memory cell includes an N-type transistor, a P-type transistor, and a current control circuit. The gate of the N-type transistor is configured to receive a first input signal. The gate of the P-type transistor is configured to receive a second input signal. The current control circuit is coupled to at least one of the N-type transistor and the P-type transistor. The current control circuit is configured to generate at least one passing current. When the input voltages of the first input signal and the second input signal are within a matching range, the N-type transistor and the P-type transistor are turned on, and the passing current is substantially a fixed current value. The matching range is related to the threshold voltages of the N-type transistor and the P-type transistor, and the fixed current value.
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