SEMICONDUCTOR STRUCTURE AND OPERATING METHOD THEREOF

    公开(公告)号:US20250169385A1

    公开(公告)日:2025-05-22

    申请号:US18631117

    申请日:2024-04-10

    Abstract: A semiconductor structure includes a gate, a channel structure, a gate insulating layer, a source, and a drain. The channel structure includes a threshold switching material, in which the channel structure includes a layered channel, a columnar channel, or a plurality of nanosheet channels. The gate insulating layer is disposed between the gate and the channel structure. The source is in direct contact with the channel structure. The drain is in direct contact with the channel structure.

    HIGH-LEVEL ARCHITECTURE FOR 3D-NAND BASED IN-MEMORY SEARCH

    公开(公告)号:US20250123750A1

    公开(公告)日:2025-04-17

    申请号:US18378960

    申请日:2023-10-11

    Abstract: A high-level architecture for 3D-NAND based in-memory search provides for receiving searches for application to select lines and word lines of a non-volatile 3D memory array. A search word is presented to a 3D-NAND memory along a direction of a bit line of the 3D-NAND memory. Each character of the word comprises a number of digits. Each digit is matched against respective layers of the 3D-NAND memory. Each digit is usable to represent one of a plurality of levels according to a selected encoding. Optionally, various lengths of words are accommodated via serial and/or parallel operations of one or more 3D-NAND memories.

    MEMORY SYSTEM AND OPERATING METHOD THEREOF

    公开(公告)号:US20250118377A1

    公开(公告)日:2025-04-10

    申请号:US18540940

    申请日:2023-12-15

    Inventor: Po-Hao TSENG

    Abstract: An operating method of a memory system is disclosed herein. The operating method includes: inputting tracking data to a tracking array; generating tracking logic values by tracking cell columns of the tracking array according to the tracking data; counting the tracking logic values to generate a summation value; adjusting a sensing time of a sensing device according to the summation value; performing a computing operation by a computing array to generate computing signals; and sensing the computing signals by the sensing device according to the adjusted sensing time.

    MULTILEVEL CONTENT ADDRESSABLE MEMORY, MULTILEVEL CODING METHOD OF AND MULTILEVEL SEARCHING METHOD

    公开(公告)号:US20230075257A1

    公开(公告)日:2023-03-09

    申请号:US18055855

    申请日:2022-11-16

    Abstract: A multilevel content addressable memory, a multilevel coding method and a multilevel searching method are provided. The multilevel coding method includes the following steps. A highest decimal value of a multilevel-bit binary data is obtained. A length of a digital string data is set as being the highest decimal value of the multilevel-bit binary data. The multilevel-bit binary data is converted into the digital string data. If a content of the multilevel-bit binary data is an exact value, a number of an indicating bit in the digital string data is the exact value.

    HYBRID TYPE CONTENT ADDRESSABLE MEMORY FOR IMPLEMENTING IN-MEMORY-SEARCH AND OPERATION METHOD THEREOF

    公开(公告)号:US20250022510A1

    公开(公告)日:2025-01-16

    申请号:US18903055

    申请日:2024-10-01

    Abstract: A hybrid type content addressable memory for implementing in-memory-search and an operation method thereof are provided. The CAM includes a plurality of CAM strings and at least one sense amplifier circuit. Each of the CAM strings includes a plurality of CAM cells. The CAM cells store a plurality of existing data. The sense amplifier circuit is connected to the CAM strings. A plurality of search data are inputted to the CAM strings. A plurality of cell matching results obtained from the CAM cells in each of the CAM strings are integrated via an AND operation to obtain a string matching result. The string matching results obtained from the CAM strings are integrated via an OR operation.

    MEMORY APPARATUS AND METHOD FOR DATA SEARCHING AND COMPARING THEREOF

    公开(公告)号:US20240386958A1

    公开(公告)日:2024-11-21

    申请号:US18785113

    申请日:2024-07-26

    Abstract: The application provides a content addressable memory (CAM) device and a method for searching and comparing data thereof. The CAM device comprises: a plurality of memory strings; and a sensing amplifier circuit coupled to the memory strings; wherein in data searching, a search data is compared with a storage data stored in the memory strings, the memory strings generate a plurality of string currents, the sensing amplifier circuit senses the string currents to generate a plurality of sensing results; based on the sensing results, a match degree between the search data and the storage data is determined as one of the follows: all-matched, partially-matched and all-mismatched.

    MEMORY DEVICE FOR PERFORMING IN-MEMORY-SEARCH AND OPERATING METHOD THEREOF

    公开(公告)号:US20240274165A1

    公开(公告)日:2024-08-15

    申请号:US18167108

    申请日:2023-02-10

    CPC classification number: G11C7/1069 G11C7/067

    Abstract: A memory device for performing in-memory-search. A search voltage corresponding to a search data is applied to the first signal lines. A plurality of second signal lines of the memory device generate output currents. The threshold voltage of each of the memory cells of the memory device corresponds to a stored data, the stored data is compared with the search data to obtain a comparison result. The output current reflects the comparison result. Values of the stored data and search data of the first memory cells are equal to values of the stored data and the search data of the second memory cells. The threshold voltage of the first memory cells is complementary to the threshold voltage of the second memory cells. The search voltage applied to the first memory cells is complementary to the search voltage applied to the second memory cells.

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