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公开(公告)号:US20250169385A1
公开(公告)日:2025-05-22
申请号:US18631117
申请日:2024-04-10
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor: Feng-Min LEE , Yu-Yu LIN , Po-Hao TSENG , Ming-Hsiu LEE
Abstract: A semiconductor structure includes a gate, a channel structure, a gate insulating layer, a source, and a drain. The channel structure includes a threshold switching material, in which the channel structure includes a layered channel, a columnar channel, or a plurality of nanosheet channels. The gate insulating layer is disposed between the gate and the channel structure. The source is in direct contact with the channel structure. The drain is in direct contact with the channel structure.
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公开(公告)号:US20250123750A1
公开(公告)日:2025-04-17
申请号:US18378960
申请日:2023-10-11
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor: Po-Hao TSENG , Ming-Hsiu LEE
IPC: G06F3/06
Abstract: A high-level architecture for 3D-NAND based in-memory search provides for receiving searches for application to select lines and word lines of a non-volatile 3D memory array. A search word is presented to a 3D-NAND memory along a direction of a bit line of the 3D-NAND memory. Each character of the word comprises a number of digits. Each digit is matched against respective layers of the 3D-NAND memory. Each digit is usable to represent one of a plurality of levels according to a selected encoding. Optionally, various lengths of words are accommodated via serial and/or parallel operations of one or more 3D-NAND memories.
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公开(公告)号:US20250118377A1
公开(公告)日:2025-04-10
申请号:US18540940
申请日:2023-12-15
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor: Po-Hao TSENG
IPC: G11C16/28
Abstract: An operating method of a memory system is disclosed herein. The operating method includes: inputting tracking data to a tracking array; generating tracking logic values by tracking cell columns of the tracking array according to the tracking data; counting the tracking logic values to generate a summation value; adjusting a sensing time of a sensing device according to the summation value; performing a computing operation by a computing array to generate computing signals; and sensing the computing signals by the sensing device according to the adjusted sensing time.
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4.
公开(公告)号:US20240363164A1
公开(公告)日:2024-10-31
申请号:US18765452
申请日:2024-07-08
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor: Po-Hao TSENG , Feng-Min LEE , Ming-Hsiu Lee
CPC classification number: G11C15/046 , G11C16/0483 , G11C16/08 , G11C16/10 , G11C16/24 , G11C16/26
Abstract: The application provides a content addressable memory (CAM) cell, a CAM memory device and an operation method thereof, and a method for searching and comparing data. The CAM cell includes a first flash memory cell having a first terminal for receiving a first search voltage; and a second flash memory cell having a first terminal for receiving a second search voltage, a second terminal of the first flash memory cell electrically connected to a second terminal of the second flash memory cell, wherein the first flash memory cell and the second flash memory cell are serially connected; and a storage data of the CAM cell is based on a combination of a plurality of threshold voltages of the first flash memory cell and the second flash memory cell.
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公开(公告)号:US20240257873A1
公开(公告)日:2024-08-01
申请号:US18162728
申请日:2023-02-01
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor: Po-Hao TSENG , Yu-Hsuan LIN , Tian-Cih BO , Feng-Min LEE , Yu-Yu LIN
IPC: G11C15/04
CPC classification number: G11C15/046
Abstract: A hybrid in-memory search (IMS) content addressable memory (CAM) cell includes: a first IMS CAM cell; and a second IMS CAM cell, coupled to the first IMS CAM cell. The first IMS CAM cell and the second IMS CAM cell are of different types. When the hybrid IMS CAM cell stores a storage data, the first IMS CAM cell stores a first part of the storage data and the second IMS CAM cell stores the storage data or a second part of the storage data.
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6.
公开(公告)号:US20230075257A1
公开(公告)日:2023-03-09
申请号:US18055855
申请日:2022-11-16
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor: Ming-Hsiu LEE , Po-Hao TSENG
Abstract: A multilevel content addressable memory, a multilevel coding method and a multilevel searching method are provided. The multilevel coding method includes the following steps. A highest decimal value of a multilevel-bit binary data is obtained. A length of a digital string data is set as being the highest decimal value of the multilevel-bit binary data. The multilevel-bit binary data is converted into the digital string data. If a content of the multilevel-bit binary data is an exact value, a number of an indicating bit in the digital string data is the exact value.
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7.
公开(公告)号:US20210224041A1
公开(公告)日:2021-07-22
申请号:US16807194
申请日:2020-03-03
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor: Po-Hao TSENG , Ming-Hsiu LEE , Yu-Hsuan LIN
Abstract: A random number generator, a random number generating circuit, and a random number generating method are provided. The random number generating circuit includes the random number generator and executes the random number generating method. The random number generator includes a shift register having N storage elements and a combinational logic circuit. The N storage elements receive a random seed in a static state and repetitively perform a bit shift operation in a plurality of clock cycles. The combinational logic circuit generates an output sequence based on the random seed and a random bitstream received from an external source.
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公开(公告)号:US20250022510A1
公开(公告)日:2025-01-16
申请号:US18903055
申请日:2024-10-01
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor: Po-Hao TSENG , Tian-Cih BO , Feng-Min LEE
IPC: G11C15/04
Abstract: A hybrid type content addressable memory for implementing in-memory-search and an operation method thereof are provided. The CAM includes a plurality of CAM strings and at least one sense amplifier circuit. Each of the CAM strings includes a plurality of CAM cells. The CAM cells store a plurality of existing data. The sense amplifier circuit is connected to the CAM strings. A plurality of search data are inputted to the CAM strings. A plurality of cell matching results obtained from the CAM cells in each of the CAM strings are integrated via an AND operation to obtain a string matching result. The string matching results obtained from the CAM strings are integrated via an OR operation.
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公开(公告)号:US20240386958A1
公开(公告)日:2024-11-21
申请号:US18785113
申请日:2024-07-26
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor: Po-Hao TSENG , Yu-Hsuan LIN , Feng-Min LEE , Yung-Chun LI
Abstract: The application provides a content addressable memory (CAM) device and a method for searching and comparing data thereof. The CAM device comprises: a plurality of memory strings; and a sensing amplifier circuit coupled to the memory strings; wherein in data searching, a search data is compared with a storage data stored in the memory strings, the memory strings generate a plurality of string currents, the sensing amplifier circuit senses the string currents to generate a plurality of sensing results; based on the sensing results, a match degree between the search data and the storage data is determined as one of the follows: all-matched, partially-matched and all-mismatched.
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公开(公告)号:US20240274165A1
公开(公告)日:2024-08-15
申请号:US18167108
申请日:2023-02-10
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor: Po-Hao TSENG , Tian-Cih BO , Feng-Min LEE
CPC classification number: G11C7/1069 , G11C7/067
Abstract: A memory device for performing in-memory-search. A search voltage corresponding to a search data is applied to the first signal lines. A plurality of second signal lines of the memory device generate output currents. The threshold voltage of each of the memory cells of the memory device corresponds to a stored data, the stored data is compared with the search data to obtain a comparison result. The output current reflects the comparison result. Values of the stored data and search data of the first memory cells are equal to values of the stored data and the search data of the second memory cells. The threshold voltage of the first memory cells is complementary to the threshold voltage of the second memory cells. The search voltage applied to the first memory cells is complementary to the search voltage applied to the second memory cells.
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