Error recovery operations
    31.
    发明授权

    公开(公告)号:US11657891B2

    公开(公告)日:2023-05-23

    申请号:US17743989

    申请日:2022-05-13

    CPC classification number: G11C29/42 G11C7/20 G11C29/44

    Abstract: A method includes determining whether a data reliability parameter associated with a set of memory cells is greater than a threshold data reliability parameter and in response to determining that the data reliability parameter is greater than the threshold data reliability parameter, performing an error recovery operation. The method further includes, subsequent to performing the error recovery operation, determining whether the data reliability parameter associated with the set of memory cells is less than the threshold data reliability parameter and in response to determining that the data reliability parameter is less than the threshold data reliability parameter, setting an offset associated with the error recovery operation as a default read voltage for the set of memory cells.

    Memory block defect detection and management

    公开(公告)号:US11625298B2

    公开(公告)日:2023-04-11

    申请号:US17746754

    申请日:2022-05-17

    Inventor: Guang Hu Ting Luo

    Abstract: An apparatus includes a memory sub-system comprising a plurality of memory blocks and a memory block defect detection component. The memory block defect detection component is to set, for a memory block among the plurality of memory blocks, a first block defect detection rate and determine whether the first block defect detection rate is greater than a threshold block defect detection rate for the at least one memory block. In response to a determination that the first block defect detection rate is greater than the threshold block defect detection rate for the memory block, the memory block defect detection component is to assert a program command on the memory block determine whether a program operation associated with assertion of the program command on the at least one memory block is successful. In response to a determination the program operation is unsuccessful, the memory block defect detection component is to determine that a failure involving a plane associated with the memory block and another plane of the memory sub-system has occurred.

    MEMORY ACCESS MODE SELECTION
    33.
    发明申请

    公开(公告)号:US20220413714A1

    公开(公告)日:2022-12-29

    申请号:US17357436

    申请日:2021-06-24

    Abstract: A method includes determining one or more quality attributes for memory cells of a memory device, receiving a memory access request involving data written to at least a portion of the memory cells, and determining whether the memory access request corresponds to a random read operation or a sequential read operation. The method further includes responsive to determining that the memory access request corresponds to a random read operation or responsive to determining that the one or more quality attributes for memory cells are greater than a threshold quality level, or both, selecting a read mode for use in performance of the random read operation and performing the random read operation using the selected read mode.

    VOLTAGE THRESHOLD PREDICTION-BASED MEMORY MANAGEMENT

    公开(公告)号:US20220334753A1

    公开(公告)日:2022-10-20

    申请号:US17234095

    申请日:2021-04-19

    Abstract: A method includes performing a first read operation involving a set of memory cells using a first voltage, determining a quantity of bits associated with the set of memory cells based on the first read operation, performing a second read operation involving the set of memory cells using a second voltage that is greater than the first voltage when the quantity of bits is above a threshold quantity of bits for the set of memory cells, and performing the second read operation involving the set of memory cells using a third voltage that is less than the first voltage when the quantity of bits is below the threshold quantity of bits for the set of memory cells.

    Error recovery operations within a memory sub-system

    公开(公告)号:US11335429B1

    公开(公告)日:2022-05-17

    申请号:US17122864

    申请日:2020-12-15

    Abstract: A method includes determining whether a data reliability parameter associated with a set of memory cells is greater than a threshold data reliability parameter and in response to determining that the data reliability parameter is greater than the threshold data reliability parameter, performing an error recovery operation. The method further includes, subsequent to performing the error recovery operation, determining whether the data reliability parameter associated with the set of memory cells is less than the threshold data reliability parameter and in response to determining that the data reliability parameter is less than the threshold data reliability parameter, setting an offset associated with the error recovery operation as a default read voltage for the set of memory cells.

    MEMORY BLOCK DEFECT DETECTION AND MANAGEMENT

    公开(公告)号:US20220138043A1

    公开(公告)日:2022-05-05

    申请号:US17087334

    申请日:2020-11-02

    Inventor: Guang Hu Ting Luo

    Abstract: An apparatus includes a memory sub-system comprising a plurality of memory blocks and a memory block defect detection component. The memory block defect detection component is to set, for a memory block among the plurality of memory blocks, a first block defect detection rate and determine whether the first block defect detection rate is greater than a threshold block defect detection rate for the at least one memory block. In response to a determination that the first block defect detection rate is greater than the threshold block defect detection rate for the memory block, the memory block defect detection component is to assert a program command on the memory block determine whether a program operation associated with assertion of the program command on the at least one memory block is successful. In response to a determination the program operation is unsuccessful, the memory block defect detection component is to determine that a failure involving a plane associated with the memory block and another plane of the memory sub-system has occurred.

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