公开(公告)号：US07825843B2

公开(公告)日：2010-11-02

申请号：US11919126

申请日：2005-10-31

申请人： Heiji Ikoma

发明人： Heiji Ikoma

IPC分类号： H03M1/66

CPC分类号： H03M1/687 ,  H03M1/745 ,  H03M1/747

摘要： In a current steering D/A converter, a 1LSB current source 1 and a 2LSB current source 2 are binary code current sources for outputting currents with current values weighted by ½, and a 4LSB current source 3 is one of a large number of current sources designed as thermometer code current source with the same structure. In first circuits A1, A2 and A4 for respectively determining constant current values of the current sources 1 through 3, a plurality of MOS transistors with a channel length L3 and a channel width W3 are cascode-connected to one another with gate terminals thereof shared. In second circuits B1, B2 and B4 respectively used for setting high output impedance of the current sources 1 through 3, a plurality of MOS transistors with a channel length L4 and a channel width W4 are cascode-connected to one another with gate terminals thereof shared. Accordingly, the current characteristics of the current sources can be made more uniform while reducing their circuit areas, resulting in improving the linearity of the D/A conversion characteristic.

摘要翻译： 在电流转向D / A转换器中，1LSB电流源1和2LSB电流源2是用于输出电流值加权1/2的二进制码电流源，4LSB电流源3是大量电流源之一 设计为具有相同结构的温度计代码电流源。 在用于分别确定电流源1至3的恒定电流值的第一电路A1，A2和A4中，具有通道长度L3和沟道宽度W3的多个MOS晶体管在共享其栅极端子之间彼此共源共存。 在分别用于设定电流源1至3的高输出阻抗的第二电路B1，B2和B4中，具有通道长度L4和沟道宽度W4的多个MOS晶体管彼此共源共栅，其栅极端共享 。 因此，可以使电流源的电流特性更均匀，同时减少其电路面积，从而提高D / A转换特性的线性度。

公开(公告)号：US20100182180A1

公开(公告)日：2010-07-22

申请号：US12439983

申请日：2008-07-09

申请人： Heiji Ikoma ,  Junji Nakatsuka

发明人： Heiji Ikoma ,  Junji Nakatsuka

IPC分类号： H03M1/66

CPC分类号： H03M1/0604 ,  H03M1/745

摘要： A D/A converter has a plurality of current sources (IS1, IS2, IS3-1 to IS3-63) including transistors and selects, according to a given digital signal, paths of the currents output from the current sources (IS1, IS2, IS3-1 to IS3-63), thereby converting the digital signal to an analog signal. In the D/A converter, a forward body bias voltage is applied to the back gate terminals of the transistors constituting each of the current sources (IS1, IS2, IS3-1 to IS3-63).

摘要翻译： AD / A转换器具有包括晶体管的多个电流源（IS1，IS2，IS3-1至IS3-63），并根据给定的数字信号选择从电流源（IS1，IS2，IS3）输出的电流的路径 -1至IS3-63），从而将数字信号转换为模拟信号。 在D / A转换器中，向构成每个电流源（IS1，IS2，IS3-1至IS3-63）的晶体管的背栅极施加正向体偏置电压。

公开(公告)号：US20090309775A1

公开(公告)日：2009-12-17

申请号：US11919126

申请日：2005-10-31

申请人： Heiji Ikoma

发明人： Heiji Ikoma

IPC分类号： H03M1/66

CPC分类号： H03M1/687 ,  H03M1/745 ,  H03M1/747

摘要： In a current steering D/A converter, a 1LSB current source 1 and a 2LSB current source 2 are binary code current sources for outputting currents with current values weighted by ½, and a 4LSB current source 3 is one of a large number of current sources designed as thermometer code current source with the same structure. In first circuits A1, A2 and A4 for respectively determining constant current values of the current sources 1 through 3, a plurality of MOS transistors with a channel length L3 and a channel width W3 are cascode-connected to one another with gate terminals thereof shared. In second circuits B1, B2 and B4 respectively used for setting high output impedance of the current sources 1 through 3, a plurality of MOS transistors with a channel length L4 and a channel width W4 are cascode-connected to one another with gate terminals thereof shared. Accordingly, the current characteristics of the current sources can be made more uniform while reducing their circuit areas, resulting in improving the linearity of the D/A conversion characteristic.

摘要翻译： 在电流转向D / A转换器中，1LSB电流源1和2LSB电流源2是用于输出电流值加权1/2的二进制码电流源，4LSB电流源3是大量电流源之一 设计为具有相同结构的温度计代码电流源。 在用于分别确定电流源1至3的恒定电流值的第一电路A1，A2和A4中，具有通道长度L3和沟道宽度W3的多个MOS晶体管在共享其栅极端子之间彼此共源共存。 在分别用于设定电流源1至3的高输出阻抗的第二电路B1，B2和B4中，具有通道长度L4和沟道宽度W4的多个MOS晶体管彼此共源共栅，其栅极端共享 。 因此，可以使电流源的电流特性更均匀，同时减少其电路面积，从而提高D / A转换特性的线性。

公开(公告)号：US06734817B2

公开(公告)日：2004-05-11

申请号：US10328159

申请日：2002-12-26

申请人： Junichi Naka ,  Yoshitsugu Inagaki ,  Hiroshi Sakura ,  Heiji Ikoma ,  Koji Oka ,  Youichi Okamoto ,  Daisuke Nomasaki

发明人： Junichi Naka ,  Yoshitsugu Inagaki ,  Hiroshi Sakura ,  Heiji Ikoma ,  Koji Oka ,  Youichi Okamoto ,  Daisuke Nomasaki

IPC分类号： H03M112

CPC分类号： H03M1/002 ,  H03M1/007 ,  H03M1/12

摘要： When the performance of an A/D converter required by a system changes, power consumption of the overall system can be reduced. The resolution of an A/D converter is made variable by changing a current flowing through an amplifier by an external control signal that specifies the resolution. Thus, when the performance required by a system changes, it is possible to change the performance of the A/D converter and to prevent a performance overhead of the A/D converter. Consequently, power consumption of the A/D converter is reduced, and power consumption of the system as a whole is also reduced.

摘要翻译： 当系统所需的A / D转换器的性能改变时，可以降低整个系统的功耗。 通过用指定分辨率的外部控制信号改变流过放大器的电流，可以使A / D转换器的分辨率可变。 因此，当系统所需的性能改变时，可以改变A / D转换器的性能并且防止A / D转换器的性能开销。 因此，A / D转换器的功耗降低，整个系统的功耗也降低。

公开(公告)号：US06310492B1

公开(公告)日：2001-10-30

申请号：US09561962

申请日：2000-05-01

申请人： Heiji Ikoma ,  Yoshitsugu Inagaki ,  Hiroyuki Konishi ,  Koji Oka ,  Akira Matsuzawa

发明人： Heiji Ikoma ,  Yoshitsugu Inagaki ,  Hiroyuki Konishi ,  Koji Oka ,  Akira Matsuzawa

IPC分类号： H03K190175

CPC分类号： H03K19/00361 ,  H03K19/0016 ,  H03K19/00315

摘要： In order to reduce power consumption, a power supply for a digital circuit portion is shut off, so that the output voltage of the power supply becomes the zero level. A CMOS (complementary metal oxide semiconductor) inverter has a P-channel FET (field effect transistor) with a gate electrode formed of P-type polysilicon. A source electrode of the P-channel FET is connected to the power supply and a back gate electrode of the P-channel FET is in direct connection with the aforesaid source electrode. The P-channel FET is placed in a state of not functioning as a transistor when the power supply is shut off in a low power consumption mode. However, in order to prevent the P-channel FET from undergoing characteristic degradation in that mode, there is the provision of a pull-down switch capable of fixing, in the mode, the voltage of the gate electrode of the P-channel FET at the zero level.

摘要翻译： 为了降低功耗，关闭数字电路部分的电源，使得电源的输出电压变为零电平。 CMOS（互补金属氧化物半导体）反相器具有由P型多晶硅形成的栅电极的P沟道FET（场效应晶体管）。 P沟道FET的源电极连接到电源，P沟道FET的背栅极与前述源极直接连接。 当在低功耗模式下关闭电源时，P沟道FET被置于不用作晶体管的状态。 然而，为了防止P沟道FET在该模式中发生特性劣化，提供了一种下拉开关，其能够在该模式中固定P沟道FET的栅电极的电压 零级。