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公开(公告)号：US10402265B2
公开(公告)日：2019-09-03
申请号：US16030479
申请日：2018-07-09
Applicant: Micron Technology, Inc.
Inventor： Harold B Noyes , David R. Brown , Paul Glendenning
Abstract: Configuration content of electronic devices used for data analysis may be altered due to bit failure or corruption, for example. Accordingly, in one embodiment, a device includes a plurality of blocks, each block of the plurality of blocks includes a plurality of rows, each row of the plurality of rows includes a plurality of configurable elements, each configurable element of the plurality of configurable elements includes a data analysis element including a memory component programmed with configuration data. The data analysis element is configured to analyze at least a portion of a data stream based on the configuration data and to output a result of the analysis. The device also includes an error detection engine (EDE) configured to perform integrity validation of the configuration data.
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公开(公告)号：US10366009B2
公开(公告)日：2019-07-30
申请号：US14992616
申请日：2016-01-11
Applicant: Micron Technology, Inc.
Inventor： David R. Brown , Harold B Noyes , Inderjit Singh Bains
IPC: G06F3/06 , G06F12/0875 , G06F9/448 , G06N3/02 , G06F13/28
Abstract: A data analysis system to analyze data. The data analysis system includes a data buffer configured to receive data to be analyzed. The data analysis system also includes a state machine lattice. The state machine lattice includes multiple data analysis elements and each data analysis element includes multiple memory cells configured to analyze at least a portion of the data and to output a result of the analysis. The data analysis system includes a buffer interface configured to receive the data from the data buffer and to provide the data to the state machine lattice.
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33.发明申请公开(公告)号：US20190095497A1
公开(公告)日：2019-03-28
申请号：US16206290
申请日：2018-11-30
Applicant: Micron Technology, Inc.
Inventor： Harold B Noyes , David R. Brown
Abstract: Apparatuses and methods are provided for reducing power consumption in a pattern-recognition processor. A power control circuit may be coupled to a block of programmed state machines to enable selective activation and deactivation of the block during a pattern search. The block may be deactivated if the pattern search is no longer active in that block and activated when needed by the pattern search. Additionally, the block may be deactivated based on an identifier of the data stream being searched. Excess blocks not used for any programmed state machines may be disabled such that they are not refreshed during a memory cycle.
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公开(公告)号：US10235627B2
公开(公告)日：2019-03-19
申请号：US15618935
申请日：2017-06-09
Applicant: Micron Technology, Inc.
Inventor： Paul D. Dlugosch , Harold B Noyes
Abstract: Methods and apparatus are provided involving adaptive content inspection. In one embodiment, a content inspection processor may identify information with respect to input data and provide the information to a host controller. The host controller may adapt search criteria or other parameters and provide the adapted parameter to the content inspection processor. Other embodiments may include a content inspection processor having integrated feedback, such that results data is fed back to the content inspection processor. The results data may be processed before being provided to the content inspection processor.
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公开(公告)号：US10180922B2
公开(公告)日：2019-01-15
申请号：US15728151
申请日：2017-10-09
Applicant: Micron Technology, Inc.
Inventor： Harold B Noyes , Steven P. King
Abstract: Disclosed are methods and devices, among which is a device including a self-selecting bus decoder. In some embodiments, the device may be coupled to a microcontroller, and the self-selecting bus decoder may determine a response of the peripheral device to requests from the microcontroller.
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Patent Agency Ranking
公开(公告)号：US09870530B2
公开(公告)日：2018-01-16
申请号：US15262958
申请日：2016-09-12
Applicant: Micron Technology, Inc.
Inventor： David R. Brown , Harold B Noyes
CPC classification number: G06N3/08 , G06K9/00986 , G06N3/063
Abstract: A device includes a match element that includes a first data input configured to receive a first result, wherein the first result is of an analysis performed on at least a portion of a data stream by an element of a state machine. The match element also includes a second data input configured to receive a second result, wherein the second result is of an analysis performed on at least a portion of the data stream by another element of the state machine. The match element further includes an output configured to selectively provide the first result or the second result.
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公开(公告)号：US20170364474A1
公开(公告)日：2017-12-21
申请号：US15534994
申请日：2015-12-29
Applicant: Micron Technology, Inc.
Inventor： Harold B Noyes , David R. Brown , Paul Glendenning , Paul D. Dlugosch
Abstract: A device includes a plurality of blocks. Each block of the plurality of blocks includes a plurality of rows. Each row of the plurality of rows includes a plurality of configurable elements and a routing line, whereby each configurable element of the plurality of configurable elements includes a data analysis element comprising a plurality of memory cells, wherein the data analysis element is configured to analyze at least a portion of a data stream and to output a result of the analysis. Each configurable element of the plurality of configurable elements also includes a multiplexer configured to transmit the result to the routing line.
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公开(公告)号：US09817678B2
公开(公告)日：2017-11-14
申请号：US15063230
申请日：2016-03-07
Applicant: Micron Technology, Inc.
Inventor： David R. Brown , Harold B Noyes
CPC classification number: G06F9/444 , G06F8/45 , G06F9/4498 , G06K9/00986
Abstract: A device including a data analysis element including a plurality of memory cells. The memory cells analyze at least a portion of a data stream and output a result of the analysis. The device also includes a detection cell. The detection cell includes an AND gate. The AND gate receives result of the analysis as a first input. The detection cell also includes a D flip-flop including an output coupled to a second input of the AND gate.
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公开(公告)号：US09785588B2
公开(公告)日：2017-10-10
申请号：US13801447
申请日：2013-03-13
Applicant: Micron Technology, Inc.
Inventor： Harold B Noyes , Stephen P. King
CPC classification number: G06F13/28 , G06F13/38 , G06F13/385 , G06F13/4004 , G06F13/4027
Abstract: Disclosed are methods and devices, among which is a device including a self-selecting bus decoder. In some embodiments, the device may be coupled to a microcontroller, and the self-selecting bus decoder may determine a response of the peripheral device to requests from the microcontroller. In another embodiment, the device may include a bus translator and a self-selecting bus decoder. The bus translator may be configured to translate between signals from a selected one of a plurality of different types of buses. A microcontroller may be coupled to a selected one of the plurality of different types of buses of the bus translator.
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公开(公告)号：US20170278002A1
公开(公告)日：2017-09-28
申请号：US15618935
申请日：2017-06-09
Applicant: Micron Technology, Inc.
Inventor： Paul D. Dlugosch , Harold B Noyes
CPC classification number: G06N5/022 , H04L63/0245
Abstract: Methods and apparatus are provided involving adaptive content inspection. In one embodiment, a content inspection processor may identify information with respect to input data and provide the information to a host controller. The host controller may adapt search criteria or other parameters and provide the adapted parameter to the content inspection processor. Other embodiments may include a content inspection processor having integrated feedback, such that results data is fed back to the content inspection processor. The results data may be processed before being provided to the content inspection processor.
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