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    Integrated Assemblies Which Include Non-Conductive-Semiconductor-Material and Conductive-Semiconductor-Material, and Methods of Forming Integrated Assemblies
    32.
    发明申请
    Integrated Assemblies Which Include Non-Conductive-Semiconductor-Material and Conductive-Semiconductor-Material, and Methods of Forming Integrated Assemblies 审中-公开

    公开(公告)号：US20200027486A1

    公开(公告)日：2020-01-23

    申请号：US16040337

    申请日：2018-07-19

    Applicant: Micron Technology, Inc.

    Inventor： Deepak Chandra Pandey ,  Si-Woo Lee

    IPC: G11C5/10 ,  G11C11/401 ,  H01L27/108

    Abstract: Some embodiments include an integrated assembly which has digit-line-contact-regions laterally spaced from one another by intervening regions. Non-conductive-semiconductor-material is over the intervening regions. Openings extend through the non-conductive-semiconductor-material to the digit-line-contact-regions. Conductive-semiconductor-material-interconnects are within the openings and are coupled with the digit-line-contact-regions. Upper surfaces of the conductive-semiconductor-material-interconnects are beneath a lower surface of the non-conductive-semiconductor-material. Metal-containing-digit-lines are over the non-conductive-semiconductor-material. Conductive regions extend downwardly from the metal-containing-digit-lines to couple with the conductive-semiconductor-material-interconnects. Some embodiments include methods of forming integrated assemblies.

    Apparatuses having body connection lines coupled with access devices
    33.
    发明授权
    Apparatuses having body connection lines coupled with access devices 有权

    公开(公告)号：US10269805B2

    公开(公告)日：2019-04-23

    申请号：US15895928

    申请日：2018-02-13

    Applicant: Micron Technology, Inc.

    Inventor： Deepak Chandra Pandey ,  Haitao Liu ,  Chandra Mouli ,  Sanh D. Tang

    IPC: G11C5/02 ,  G11C5/06 ,  H01L27/108 ,  H01L29/78

    Abstract: Some embodiments include an apparatus having a transistor associated with a vertically-extending semiconductor pillar. The transistor includes an upper source/drain region within the vertically-extending semiconductor pillar, a lower source/drain region within the vertically-extending semiconductor pillar, and a channel region within the vertically-extending semiconductor pillar and between the upper and lower source/drain regions. The transistor also includes a gate along the channel region. A wordline is coupled with the gate of the transistor. A digit line is coupled with the lower source/drain region of the transistor. A programmable device is coupled with the upper source/drain region of the transistor. A body connection line is over the wordline and extends parallel to the wordline. The body connection line has a lateral edge that penetrates into the vertically-extending semiconductor material pillar. The body connection line is of a different composition than the semiconductor material pillar.

    Integrated Assemblies Having Void Regions Between Digit Lines and Conductive Structures, and Methods of Forming Integrated Assemblies
    39.
    发明申请
    Integrated Assemblies Having Void Regions Between Digit Lines and Conductive Structures, and Methods of Forming Integrated Assemblies 有权

    公开(公告)号：US20220036927A1

    公开(公告)日：2022-02-03

    申请号：US17501940

    申请日：2021-10-14

    Applicant: Micron Technology, Inc.

    Inventor： Naveen Kaushik ,  Fatma Arzum Simsek-Ege ,  Deepak Chandra Pandey

    IPC: G11C5/06 ,  H01L27/108

    Abstract: Some embodiments include an integrated assembly having a memory array, and having digit lines extending along a first direction through the memory array. Insulative spacers are along sidewalls of the digit lines. The insulative spacers extend continuously along the digit lines through the memory array. Conductive regions are laterally spaced from the digit lines by intervening regions. The conductive regions are configured as segments spaced apart from one another along the first direction. The intervening regions include regions of the insulative spacers and include void regions adjacent the regions of the insulative spacers. The void regions are configured as void-region-segments which are spaced apart from one another along the first direction by insulative structures. Storage-elements are associated with the conductive regions. Some embodiments include methods of forming integrated assemblies.

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