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31.发明申请公开(公告)号：US20110080190A1
公开(公告)日：2011-04-07
申请号：US12897217
申请日：2010-10-04
Applicant: Pascal Fornara , Fabrice Marinet
Inventor： Pascal Fornara , Fabrice Marinet
IPC: H03K19/00
CPC classification number: H01L23/573 , H01L21/26506 , H01L21/3223 , H01L2924/0002 , H01L2924/00
Abstract: A method for protecting, against laser attacks, an integrated circuit chip formed inside and on top of a semiconductor substrate and including in the upper portion of the substrate an active portion in which are formed components, this method including the steps of: forming in the substrate a gettering area extending under the active portion, the upper limit of the area being at a depth ranging between 5 and 50 μm from the upper surface of the substrate; and introducing diffusing metal impurities into the substrate.
Abstract translation: 一种用于对激光攻击进行保护的方法，在半导体衬底内部和之上形成集成电路芯片，并且在衬底的上部包括形成有部件的有源部分，该方法包括以下步骤： 衬底在有源部分下方延伸的吸气区域，该区域的上限距离衬底的上表面在5至50μm的深度范围内; 并将扩散金属杂质引入衬底中。
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公开(公告)号：US20110079881A1
公开(公告)日：2011-04-07
申请号：US12897231
申请日：2010-10-04
Applicant: Pascal Fornara , Fabrice Marinet
Inventor： Pascal Fornara , Fabrice Marinet
IPC: H01L29/32
CPC classification number: H01L23/573 , H01L21/26506 , H01L21/3221 , H01L2924/0002 , H01L2924/00
Abstract: An integrated circuit chip formed inside and on top of a semiconductor substrate and including: in the upper portion of the substrate, an active portion in which components are formed; and under the active portion and at a depth ranging between 5 and 50 μm from the upper surface of the substrate, an area comprising sites for gettering metal impurities and containing metal atoms at a concentration ranging between 1017 and 1018 atoms/cm3.
Abstract translation: 一种集成电路芯片，形成在半导体衬底的内部和顶部，并且包括：在衬底的上部，形成有部件的有源部分; 并且在活性部分和距离衬底的上表面5至50μm之间的深度范围内，包括用于吸收金属杂质并且含有浓度范围为1017至1018原子/ cm3之间的金属原子的位置的区域。
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33.发明申请公开(公告)号：US20100308898A1
公开(公告)日：2010-12-09
申请号：US12793204
申请日：2010-06-03
Applicant: Christian RIVERO , Pascal Fornara
Inventor： Christian RIVERO , Pascal Fornara
IPC: G11C5/14 , H01L29/66 , H01L21/768
Abstract: An integrated circuit may include a region containing a thermoelectric material and be configured to be subjected to a temperature gradient resulting from a flow of an electric current in a part of the integrated circuit during its operation, and an electrically conducting output coupled to the region for delivering the electrical energy produced by thermoelectric material.
Abstract translation: 集成电路可以包括含有热电材料的区域，并且被配置为经受在其工作期间在集成电路的一部分中的电流流动导致的温度梯度，以及耦合到该区域的导电输出 传递由热电材料产生的电能。
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公开(公告)号：US20100158072A1
公开(公告)日：2010-06-24
申请号：US12643537
申请日：2009-12-21
Applicant: Pascal Fornara , Christian Rivero
Inventor： Pascal Fornara , Christian Rivero
CPC classification number: G01K13/00 , H01H1/0036 , H01H37/46 , H01H2037/008
Abstract: A device for monitoring the temperature surrounding a circuit, including: a charge storage element; a charge evacuation device; and a thermo-mechanical switch connecting the storage element to the evacuation element, the switch being capable of closing without the circuit being electrically powered, when the temperature exceeds a threshold.
Abstract translation: 一种用于监测电路周围温度的装置，包括：电荷存储元件; 充电撤离装置; 以及将所述存储元件连接到所述排气元件的热机械开关，当所述温度超过阈值时，所述开关能够关闭而不使所述电路被电力供电。
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Patent Agency Ranking
公开(公告)号：US09177994B2
公开(公告)日：2015-11-03
申请号：US13549248
申请日：2012-07-13
Applicant: Pascal Fornara , Christian Rivero
Inventor： Pascal Fornara , Christian Rivero
CPC classification number: H01L35/32 , H01L23/5226 , H01L23/528 , H01L27/16 , H01L2924/0002 , H01L2924/00
Abstract: An integrated thermoelectric generator includes a semiconductor. A set of thermocouples are electrically connected in series and thermally connected in parallel. The set of thermocouples include parallel semiconductor regions. Each semiconductor region has one type of conductivity from among two opposite types of conductivity. The semiconductor regions are electrically connected in series so as to form a chain of regions having, alternatingly, one and the other of the two types of conductivity.
Abstract translation: 集成热电发电机包括半导体。 一组热电偶串联电连接并并联热连接。 该组热电偶包括平行半导体区域。 每个半导体区域具有两种相反类型的导电性中的一种导电性。 半导体区域串联电连接，以便形成交替地具有两种导电性中的一种和另一种的区域链。
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公开(公告)号：US08759898B2
公开(公告)日：2014-06-24
申请号：US12990682
申请日：2009-05-12
Applicant: Pascal Fornara
Inventor： Pascal Fornara
IPC: H01L29/788
CPC classification number: H01L27/1052 , H01L27/112 , H01L27/11213 , H01L27/11519 , H01L27/11521
Abstract: A non-volatile memory including at least first and second memory cells each including a storage MOS transistor with dual gates and an insulation layer provided between the two gates. The insulation layer of the storage transistor of the second memory cell includes at least one portion that is less insulating than the insulation layer of the storage transistor of the first memory cell.
Abstract translation: 包括至少第一和第二存储器单元的非易失性存储器，每个存储单元包括具有双栅极的存储MOS晶体管和设置在两个栅极之间的绝缘层。 第二存储单元的存储晶体管的绝缘层包括与第一存储单元的存储晶体管的绝缘层绝缘性更差的至少一部分。
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公开(公告)号：US20130088263A1
公开(公告)日：2013-04-11
申请号：US13615309
申请日：2012-09-13
Applicant: Francesco La Rosa , Pascal Fornara
Inventor： Francesco La Rosa , Pascal Fornara
CPC classification number: G01R27/2605 , G01R17/02 , G04F10/10 , G04F13/00 , G11C11/24 , G11C27/024 , H01G4/005 , H01G4/018 , H01G4/38 , H01L21/84 , H01L23/5223 , H01L27/0805 , H01L27/1203 , H01L28/40 , H01L29/94 , H01L2924/0002 , H01L2924/00
Abstract: A charge flow circuit for a time measurement, including a plurality of elementary capacitive elements electrically in series, each elementary capacitive element leaking through its dielectric space.
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38.发明授权公开(公告)号：US08399280B2
公开(公告)日：2013-03-19
申请号：US12897217
申请日：2010-10-04
Applicant: Pascal Fornara , Fabrice Marinet
Inventor： Pascal Fornara , Fabrice Marinet
IPC: H01L21/00
CPC classification number: H01L23/573 , H01L21/26506 , H01L21/3223 , H01L2924/0002 , H01L2924/00
Abstract: A method for protecting, against laser attacks, an integrated circuit chip formed inside and on top of a semiconductor substrate and including in the upper portion of the substrate an active portion in which are formed components, this method including the steps of: forming in the substrate a gettering area extending under the active portion, the upper limit of the area being at a depth ranging between 5 and 50 μm from the upper surface of the substrate; and introducing diffusing metal impurities into the substrate.
Abstract translation: 一种用于对激光攻击进行保护的方法，在半导体衬底内部和之上形成集成电路芯片，并且在衬底的上部包括形成有部件的有源部分，该方法包括以下步骤： 衬底在有源部分下方延伸的吸气区域，该区域的上限距离衬底的上表面在5至50μm的深度范围内; 并将扩散金属杂质引入衬底中。
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39.发明授权公开(公告)号：US08298848B2
公开(公告)日：2012-10-30
申请号：US12793204
申请日：2010-06-03
Applicant: Christian Rivero , Pascal Fornara
Inventor： Christian Rivero , Pascal Fornara
IPC: H01L21/768
Abstract: An integrated circuit may include a region containing a thermoelectric material and be configured to be subjected to a temperature gradient resulting from a flow of an electric current in a part of the integrated circuit during its operation, and an electrically conducting output coupled to the region for delivering the electrical energy produced by thermoelectric material.
Abstract translation: 集成电路可以包括含有热电材料的区域，并且被配置为经受在其工作期间在集成电路的一部分中的电流流动导致的温度梯度，以及耦合到该区域的导电输出 传递由热电材料产生的电能。
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