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38 条记录 (耗时 0.028 秒)

    Silicon pillars for vertical transistors
    31.
    发明授权
    Silicon pillars for vertical transistors 有权
    用于垂直晶体管的硅柱

    公开(公告)号：US08026579B2

    公开(公告)日：2011-09-27

    申请号：US12783462

    申请日：2010-05-19

    申请人： Patrick Thomas

    发明人： Patrick Thomas

    IPC分类号： H01L39/00

    CPC分类号： H01L27/10841 ,  H01L21/3065 ,  H01L21/3081 ,  H01L27/0214 ,  H01L27/10876 ,  H01L29/66666

    摘要： In order to form a more stable silicon pillar which can be used for the formation of vertical transistors in DRAM cells, a multi-step masking process is used. In a preferred embodiment, an oxide layer and a nitride layer are used as masks to define trenches, pillars, and active areas in a substrate. Preferably, two substrate etch processes use the masks to form three levels of bulk silicon.

    摘要翻译： 为了形成可用于在DRAM单元中形成垂直晶体管的更稳定的硅柱，使用多步骤屏蔽工艺。 在优选实施例中，氧化物层和氮化物层用作掩模以限定衬底中的沟槽，柱和有源区。 优选地，两个基板蚀刻工艺使用掩模形成三层体硅。

    SYSTEM, METHOD, APPARATUS, AND COMPUTER PROGRAM PRODUCT FOR MONITORING THE TRANFER OF CARGO TO AND FROM A TRANSPORTER
    32.
    发明申请
    SYSTEM, METHOD, APPARATUS, AND COMPUTER PROGRAM PRODUCT FOR MONITORING THE TRANFER OF CARGO TO AND FROM A TRANSPORTER 有权
    系统，方法，装置和计算机程序产品用于监控货物到和从运输工具转运

    公开(公告)号：US20080252417A1

    公开(公告)日：2008-10-16

    申请号：US11734853

    申请日：2007-04-13

    申请人： Patrick Thomas ,  John Charles Alvarez ,  Leroy E. Scheppmann

    发明人： Patrick Thomas ,  John Charles Alvarez ,  Leroy E. Scheppmann

    IPC分类号： H04Q5/22

    CPC分类号： B66C13/48 ,  B66C13/46 ,  G06Q10/08

    摘要： Systems, methods, apparatus, and computer program products are provided for monitoring the transfer of cargo, such as a shipping container, to and from a transporter, such as a truck. Identification codes are provided on the cargo and the transporter to aid in the identification of the cargo and the transporter. One or more identification code receiving devices, such as a camera, may be associated with a cargo moving apparatus, such as a crane, and configured to automatically capture the transporter identification code and the cargo identification code as the cargo is being transferred to or from the transporter. The transporter identification code and the cargo identification code can be associated with each other along with other information about the transfer in order to monitor the transfer. In this regard, identification information may be communicated to a shipping terminal's operating system to provide real-time information about one or more transfers occurring within a shipping terminal.

    摘要翻译： 提供了系统，方法，设备和计算机程序产品，用于监控诸如运输容器之类的货物（例如运输工具）如卡车的转运。 在货物和运输工具上提供了识别码，以帮助货物和运输工具的识别。 诸如照相机的一个或多个识别码接收装置可以与诸如起重机的货物移动装置相关联，并且被配置为当货物被转移到或从其传送时自动捕获运输人识别码和货物识别码 运输者。 运输者识别码和货物识别码可以与关于传送的其他信息相关联，以便监视传送。 在这方面，可以将识别信息传送到运输终端的操作系统，以提供关于在运输终端内发生的一次或多次转移的实时信息。

    Silicon pillars for vertical transistors
    33.
    发明授权
    Silicon pillars for vertical transistors 有权
    用于垂直晶体管的硅柱

    公开(公告)号：US07247570B2

    公开(公告)日：2007-07-24

    申请号：US10922583

    申请日：2004-08-19

    申请人： Patrick Thomas

    发明人： Patrick Thomas

    IPC分类号： H01L21/311

    CPC分类号： H01L27/10841 ,  H01L21/3065 ,  H01L21/3081 ,  H01L27/0214 ,  H01L27/10876 ,  H01L29/66666

    摘要： In order to form a more stable silicon pillar which can be used for the formation of vertical transistors in DRAM cells, a multi-step masking process is used. In a preferred embodiment, an oxide layer and a nitride layer are used as masks to define trenches, pillars, and active areas in a substrate. Preferably, two substrate etch processes use the masks to form three levels of bulk silicon.

    摘要翻译： 为了形成可用于在DRAM单元中形成垂直晶体管的更稳定的硅柱，使用多步骤屏蔽工艺。 在优选实施例中，氧化物层和氮化物层用作掩模以限定衬底中的沟槽，柱和有源区。 优选地，两个基板蚀刻工艺使用掩模形成三层体硅。

    Silicon pillars for vertical transistors
    35.
    发明申请
    Silicon pillars for vertical transistors 有权
    用于垂直晶体管的硅柱

    公开(公告)号：US20060038259A1

    公开(公告)日：2006-02-23

    申请号：US10922583

    申请日：2004-08-19

    申请人： Patrick Thomas

    发明人： Patrick Thomas

    IPC分类号： H01L21/20 ,  H01L21/3205 ,  H01L21/4763 ,  H01L29/06

    CPC分类号： H01L27/10841 ,  H01L21/3065 ,  H01L21/3081 ,  H01L27/0214 ,  H01L27/10876 ,  H01L29/66666

    摘要： In order to form a more stable silicon pillar which can be used for the formation of vertical transistors in DRAM cells, a multi-step masking process is used. In a preferred embodiment, an oxide layer and a nitride layer are used as masks to define trenches, pillars, and active areas in a substrate. Preferably, two substrate etch processes use the masks to form three levels of bulk silicon.

    摘要翻译： 为了形成可用于在DRAM单元中形成垂直晶体管的更稳定的硅柱，使用多步骤屏蔽工艺。 在优选实施例中，氧化物层和氮化物层用作掩模以限定衬底中的沟槽，柱和有源区。 优选地，两个基板蚀刻工艺使用掩模形成三层体硅。

    System and method for producing technology-based price targets for a company stock
    38.
    发明授权
    System and method for producing technology-based price targets for a company stock 失效
    为公司股票生产基于技术的价格目标的制度和方法

    公开(公告)号：US06832211B1

    公开(公告)日：2004-12-14

    申请号：US09718799

    申请日：2000-11-22

    申请人： Patrick Thomas ,  Francis Narin

    发明人： Patrick Thomas ,  Francis Narin

    IPC分类号： G06F1760

    CPC分类号： G06Q40/06 ,  G06Q40/00 ,  G06Q40/04

    摘要： Target valuations for company stocks are produced based on the strength and quality of their technology. The valuations are derived from a combination of indicators that measure the quality of companies' patented technology, and their commitment to research and development. Indicators may include citation indicators that measure the impact of companies' patents on later technological developments, the strength of the link between companies' patents and scientific research, the speed at which companies innovate, and the proportion of companies' sales spent on research and development. The technology-based valuation may be used to identify investment opportunities in the stock market.

    摘要翻译： 公司股票的目标估值是根据其技术的实力和质量来生产的。 这些估值来源于衡量公司专利技术质量的指标，以及他们对研发的承诺。 指标可能包括衡量公司专利对后期技术发展的影响的引用指标，公司专利与科学研究之间的联系实力，企业创新速度以及公司在研发上的销售比例 。 基于技术的估值可用于识别股票市场的投资机会。