公开(公告)号：US20170317226A1

公开(公告)日：2017-11-02

申请号：US15469454

申请日：2017-03-24

Applicant: Renesas Electronics Corporation

Inventor： Tadashi YAMAGUCHI

IPC: H01L31/18 ,  H01L31/109 ,  H01L31/103 ,  H01L31/0224

CPC classification number: H01L31/1864 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14643 ,  H01L27/14689 ,  H01L27/14698 ,  H01L31/02161 ,  H01L31/022408 ,  H01L31/02327 ,  H01L31/103 ,  H01L31/109 ,  H01L31/186

Abstract: The performances of a semiconductor device are improved. A method for manufacturing a semiconductor device includes the steps of: providing a semiconductor substrate having a gettering layer formed by ion implanting a cluster, and an epitaxial layer; subjecting the semiconductor substrate to a heat treatment at 800° C. or more, and thereby forming a hydrogen adsorption site; forming an element isolation film at the semiconductor substrate, to be performed thereafter; implanting an impurity for forming a first semiconductor region in the semiconductor substrate; implanting an impurity for forming a second semiconductor region; and performing a heat treatment for a photodiode, to be performed thereafter.

公开(公告)号：US20170271513A1

公开(公告)日：2017-09-21

申请号：US15505563

申请日：2014-12-02

Applicant: Renesas Electronics Corporation

Inventor： Tadashi YAMAGUCHI

IPC: H01L29/78 ,  H01L21/285 ,  H01L29/66 ,  H01L27/11568 ,  H01L27/11573

CPC classification number: H01L29/7845 ,  H01L21/28518 ,  H01L21/28568 ,  H01L27/115 ,  H01L27/11568 ,  H01L27/11573 ,  H01L28/00 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/665 ,  H01L29/66545

Abstract: A silicide layer on a gate electrode of a MONOS memory is prevented from being disconnected, and a property of a MISFET is improved. As means for that, when a memory cell and a MISFET formed by so-called gate-last process are mixedly mounted, a silicide layer on a source/drain region is formed by a salicide process with relatively high temperature heat treatment, and then, a silicide layer is formed on each of the control gate electrode and the memory gate electrode of the memory cell by a salicide process with relatively low temperature heat treatment.

公开(公告)号：US20160013241A1

公开(公告)日：2016-01-14

申请号：US14747019

申请日：2015-06-23

Applicant: Renesas Electronics Corporation

Inventor： Tadashi YAMAGUCHI

IPC: H01L27/146

CPC classification number: H01L27/14645 ,  H01L27/14612 ,  H01L27/1462 ,  H01L27/14621 ,  H01L27/14623 ,  H01L27/14627 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/14685 ,  H01L27/14689

Abstract: To provide a semiconductor device having improved performance.A semiconductor substrate has an element formation surface, a light receiving surface opposite thereto, a transfer transistor formed on the side of the element formation surface, a photodiode coupled in series with the transfer transistor, and a wiring formed on the element formation surface. The semiconductor substrate has, on the light receiving surface thereof, a second insulating film which is a reaction film obtained by the reaction between a first amorphous insulating film and the semiconductor substrate made of silicon. Due to holes trapped in the interface states of the second insulating film, an inversion layer is formed on the light receiving side of the semiconductor substrate. It contributes to reduction in dark current noise caused by electrons generated at the crystal defects on the light receiving surface of the semiconductor substrate or in the vicinity thereof.

Abstract translation: 提供具有改进性能的半导体器件。 半导体衬底具有元件形成表面，与其相对的光接收表面，形成在元件形成表面侧的转移晶体管，与转移晶体管串联耦合的光电二极管，以及形成在元件形成表面上的布线。 半导体衬底在其光接收表面上具有第二绝缘膜，该第二绝缘膜是通过第一非晶绝缘膜和由硅制成的半导体衬底之间的反应获得的反应膜。 由于在第二绝缘膜的界面状态下被捕获的孔，在半导体衬底的光接收侧形成反型层。 有助于降低在半导体衬底的光接收表面或其附近的晶体缺陷处产生的电子引起的暗电流噪声。

公开(公告)号：US20140319588A1

公开(公告)日：2014-10-30

申请号：US14326924

申请日：2014-07-09

Applicant: Renesas Electronics Corporation

Inventor： Tadashi YAMAGUCHI

IPC: H01L27/146 ,  H01L23/26

CPC classification number: H01L27/1461 ,  H01L23/26 ,  H01L27/14612 ,  H01L27/1463 ,  H01L27/14636 ,  H01L27/14643 ,  H01L27/14698 ,  H01L31/0352 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Provided is a semiconductor device having good properties. Particularly, the semiconductor device is provided which can improve imaging properties. The semiconductor device (CMOS image sensor) includes a plurality of pixels, each having a photodiode PD for generating a charge by receiving light, and a transfer transistor TX for transferring the charge generated by the photodiode PD. The semiconductor device further includes an active region AcTP with the photodiode, and an active region AcG located on an upper side of the region AcTP in the planar direction and having a contact Pg to which a ground potential is applied. A gettering region GET is disposed in the active region AcG.

Abstract translation: 提供具有良好性能的半导体器件。 特别地，提供了可以提高成像性能的半导体器件。 半导体器件（CMOS图像传感器）包括多个像素，每个像素具有用于通过接收光产生电荷的光电二极管PD，以及用于传输由光电二极管PD产生的电荷的传输晶体管TX。 该半导体器件还包括具有光电二极管的有源区AcTP和位于区域AcTP的上侧的平面方向上的有源区AcG，并具有施加接地电位的触点Pg。 吸收区域GET被放置在活动区域​​AcG中。

公开(公告)号：US20130341693A1

公开(公告)日：2013-12-26

申请号：US13909310

申请日：2013-06-04

Applicant: Renesas Electronics Corporation

Inventor： Tadashi YAMAGUCHI

IPC: H01L31/0352 ,  H01L27/146

CPC classification number: H01L27/1461 ,  H01L23/26 ,  H01L27/14612 ,  H01L27/1463 ,  H01L27/14636 ,  H01L27/14643 ,  H01L27/14698 ,  H01L31/0352 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Provided is a semiconductor device having good properties. Particularly, the semiconductor device is provided which can improve imaging properties. The semiconductor device (CMOS image sensor) includes a plurality of pixels, each having a photodiode PD for generating a charge by receiving light, and a transfer transistor TX for transferring the charge generated by the photodiode PD. The semiconductor device further includes an active region AcTP with the photodiode, and an active region AcG located on an upper side of the region AcTP in the planar direction and having a contact Pg to which a ground potential is applied. A gettering region GET is disposed in the active region AcG.

Abstract translation: 提供具有良好性能的半导体器件。 特别地，提供了可以提高成像性能的半导体器件。 半导体器件（CMOS图像传感器）包括多个像素，每个像素具有用于通过接收光产生电荷的光电二极管PD，以及用于传输由光电二极管PD产生的电荷的传输晶体管TX。 该半导体器件还包括具有光电二极管的有源区AcTP和位于区域AcTP的上侧的平面方向上的有源区AcG，并具有施加接地电位的触点Pg。 吸收区域GET被放置在活动区域​​AcG中。