Computer-implemented methods and systems for accessing data in a computer system by a user
    31.
    发明授权
    Computer-implemented methods and systems for accessing data in a computer system by a user 有权
    用于由用户访问计算机系统中的数据的计算机实现的方法和系统

    公开(公告)号:US07536651B2

    公开(公告)日:2009-05-19

    申请号:US11319368

    申请日:2005-12-29

    申请人: Robert Reiner

    发明人: Robert Reiner

    IPC分类号: G06F3/00

    摘要: Methods and systems are provided for accessing, processing, and outputting data on a graphical output device for a user is provided. In one implementation, a method is provided that comprises presenting on the graphical output device a first portion of a data object in a window, wherein the data object contains a plurality of data object items, at least one of the data object items being sought by the user, and wherein the data object contains more data object items than being presentable in the window at a given moment in time. The method may further include providing on the graphical output device first and second control elements in relation to the presented data object, the first and second control elements being arranged to be activated by means of a user-operated input device in order to generate first and second request signals, respectively, upon such activation. Further, the method comprises effecting, upon generating respective first or second request signals, a scroll step into a direction corresponding to the respectively generated first and second request signals having a predetermined step size towards the data object item sought by the user, and presenting another portion of the data object in the window at least partially differing from the first portion of the data object, the step size between subsequently presented portions of the data object decreasing in proportion with the number of generated first or second request signals to effect a series of one or more scroll steps towards the sought data object item among the data object items.

    摘要翻译: 提供了用于访问,处理和输出用于用户的图形输出设备上的数据的方法和系统。 在一个实现中,提供了一种方法,其包括在图形输出设备上呈现窗口中的数据对象的第一部分,其中数据对象包含多个数据对象项,至少一个数据对象项由 用户,并且其中数据对象包含比在给定时刻在窗口中呈现的更多的数据对象项。 该方法还可以包括在图形输出设备上提供与所呈现的数据对象相关的第一和第二控制元件,第一和第二控制元件被布置成借助于用户操作的输入设备被激活,以便产生第一和第 第二请求信号。 此外,该方法包括在产生相应的第一或第二请求信号时,将滚动步骤转换成与向用户所寻求的数据对象项目具有预定步长的分别产生的第一和第二请求信号相对应的方向,并呈现另一个 窗口中的数据对象的部分与数据对象的第一部分至少部分不同,数据对象的后续呈现部分之间的步长与生成的第一或第二请求信号的数量成比例地减小,以实现一系列 在数据对象项目中朝向所寻求的数据对象项目的一个或多个滚动步骤。

    Invoice exception management
    32.
    发明申请
    Invoice exception management 审中-公开
    发票异常管理

    公开(公告)号:US20080133388A1

    公开(公告)日:2008-06-05

    申请号:US11607145

    申请日:2006-12-01

    IPC分类号: G06Q40/00

    CPC分类号: G06Q30/06 G06Q30/04

    摘要: The disclosure provides a system, method, and software for facilitating invoice exception management. Particularly, this disclosure describes systems, method, and software for facilitating invoice exception management. The software comprises computer readable instructions. When executed, the software is operable to receive an invoice into a distributed business application. The software can identify an exception to the invoice. If an exception to the invoice is identified, the software automatically presents resolution options for the identified exception to a user via an invoice center interface.

    摘要翻译: 本公开提供了一种促进发票异常管理的系统,方法和软件。 特别地,本公开描述了用于促进发票异常管理的系统,方法和软件。 该软件包括计算机可读指令。 执行时,该软件可操作以将发票接收到分布式业务应用程序中。 该软件可以识别发票的例外。 如果发现了发票的例外情况,软件将通过发票中心界面自动向用户显示已识别异常的分辨率选项。

    Method of selecting line item kind for invoice database
    33.
    发明申请
    Method of selecting line item kind for invoice database 审中-公开
    选择发票数据库的行项目种类的方法

    公开(公告)号:US20070094136A1

    公开(公告)日:2007-04-26

    申请号:US11255973

    申请日:2005-10-24

    IPC分类号: G06Q40/00

    CPC分类号: G06Q30/04 G06Q20/102

    摘要: Systems and methods are disclosed for providing an interface on a user display by a computer system, which enables the user to input, view, and interact with an invoice. The invoice may include one or more line items, each having one or more item attributes. One of the item attributes may be an item kind attribute. The item kind attribute may indicate the line item as an initial invoice item, a subsequent credit item, a subsequent debit item, a credit memo item, or any other suitable type of line item. A mechanism, such as a drop down menu, may be provided on the interface to enable the user to select an appropriate item kind.

    摘要翻译: 公开了用于通过计算机系统在用户显示器上提供界面的系统和方法,其使用户能够输入,查看和与发票交互。 发票可以包括一个或多个订单项,每个订单项都有一个或多个项目属性。 项目属性之一可以是项目种类属性。 项目种类属性可以将订单项指示为初始发票项目,后续信用项目,后续借记项目,贷项单据项目或任何其他合适类型的订单项。 可以在界面上提供诸如下拉菜单的机制,以使用户能够选择适当的项目种类。

    Electronic device having an operating mode and an energy saving standby mode, and a method for switching between the two modes
    34.
    发明授权
    Electronic device having an operating mode and an energy saving standby mode, and a method for switching between the two modes 有权
    具有操作模式和节能待机模式的电子设备,以及用于在两种模式之间切换的方法

    公开(公告)号:US06920342B2

    公开(公告)日:2005-07-19

    申请号:US10174059

    申请日:2002-06-17

    申请人: Robert Reiner

    发明人: Robert Reiner

    IPC分类号: H04B1/16

    摘要: An electronic device has an operating mode and an energy saving standby mode. The electronic device includes an input-side antenna element for receiving a signal carrying information, a receiving unit for processing the basic information carried on the signal, a voltage supply unit for providing the supply voltage required for operation, and a switching unit for switching between the operating mode and the standby mode. First, to minimize the current being drawn in the standby mode, and second to ensure quick and reliable switching from the energy saving standby mode to the operating mode as required, it is proposed that the signal carrying the information includes a number of modulated frequency bands. At least one frequency band is intended for the basic information to be processed by the receiving unit. The other frequency band contains wake-up information for actuating the switching unit.

    摘要翻译: 电子设备具有操作模式和节能待机模式。 电子设备包括用于接收信号携带信息的输入侧天线元件,用于处理承载在该信号上的基本信息的接收单元,用于提供操作所需的电源电压的电压供应单元,以及用于在 操作模式和待机模式。 首先,为了最小化在待机模式下被抽取的电流,第二,为了确保从节能待机模式到所需的操作模式的快速可靠的切换,提出携带信息的信号包括多个调制频带 。 至少一个频带用于由接收单元处理的基本信息。 另一个频带包含用于启动开关单元的唤醒信息。

    Data carrier with regulation of the power consumption
    35.
    发明授权
    Data carrier with regulation of the power consumption 有权
    数据载体调节功耗

    公开(公告)号:US06581842B2

    公开(公告)日:2003-06-24

    申请号:US09771914

    申请日:2001-01-29

    IPC分类号: G06K1906

    CPC分类号: G06K19/0701 G06K19/0723

    摘要: A data carrier, in particular a smart card, is described and has at least one transmitting/receiving antenna and also a rectifier circuit connected downstream thereof and serving for providing a supply voltage for at least one circuit unit. A voltage regulating circuit is connected in parallel with the supply voltage terminals of the circuit unit. The voltage regulating circuit has an output at which a signal proportional to a regulating signal of the voltage regulating circuit can be tapped off. This output is connected to the control input of a controllable clock signal generator, which provides the clock signal for the at least one circuit unit.

    摘要翻译: 描述数据载体,特别是智能卡,并且具有至少一个发送/接收天线以及连接在其下游的用于为至少一个电路单元提供电源电压的整流电路。 电压调节电路与电路单元的电源电压端并联连接。 电压调节电路具有与电压调节电路的调节信号成比例的信号可被分接的输出。 该输出连接到可控时钟信号发生器的控制输入端,该可控时钟信号发生器为至少一个电路单元提供时钟信号。

    Method and connection arrangement for producing a smart card
    36.
    发明授权
    Method and connection arrangement for producing a smart card 有权
    用于生产智能卡的方法和连接方案

    公开(公告)号:US06190942B1

    公开(公告)日:2001-02-20

    申请号:US09284228

    申请日:1999-06-09

    IPC分类号: H01L2144

    摘要: The invention concerns a process and a connecting arrangement for producing a chip card, wherein a semiconductor chip on a module is fitted in an opening in a card carrier with the attainment of an electrical and mechanical connection. In accordance with the invention, in place of connections which were hitherto necessary involving a force-locking relationship and/or involving the materials being bonded together, recourse is made to inductive and/or capacitive coupling between the module and the IC-card. For that purpose the module and the card correspondingly have coils and/or capacitive coupling surfaces for signal transmission purposes.

    摘要翻译: 本发明涉及一种用于制造芯片卡的工艺和连接装置,其中模块上的半导体芯片被装配在卡片载体的开口中,以达到电气和机械连接。 根据本发明,代替迄今为止必须涉及到力锁定关系的连接和/或将材料结合在一起的连接,借助于模块和IC卡之间的电感和/或电容耦合。 为此,模块和卡对应地具有用于信号传输目的的线圈和/或电容耦合表面。

    Encoding device
    37.
    发明授权
    Encoding device 失效
    编码设备

    公开(公告)号:US5995629A

    公开(公告)日:1999-11-30

    申请号:US911676

    申请日:1997-08-15

    申请人: Robert Reiner

    发明人: Robert Reiner

    摘要: An encoding device includes an encoding unit and an output register downstream of the encoding unit. During a second time period, encoded output data are formed from input data fed to the encoding unit and are written into the output register. After the second time period elapses, no further data are fed to the output register, but power consumption of the output register must not alter. The encoding unit continues to generate output data until a first time period elapses. The encoding device prevents an external observer from drawing any conclusions from the power consumption of the encoding device as to the actual generating period of the encoded output data in the output register.

    摘要翻译: 编码装置包括编码单元和编码单元下游的输出寄存器。 在第二时间段期间,编码的输出数据由输入到编码单元的输入数据形成,并被写入输出寄存器。 经过第二个时间段后,没有进一步的数据被馈送到输出寄存器,但输出寄存器的功耗不能改变。 编码单元继续生成输出数据直到经过第一时间段。 编码装置防止外部观察者从输出寄存器中的编码输出数据的实际生成周期中得出编码装置的功耗的任何结论。

    Contactless chip card
    38.
    发明授权
    Contactless chip card 失效
    非接触式芯片卡

    公开(公告)号:US5955723A

    公开(公告)日:1999-09-21

    申请号:US963183

    申请日:1997-11-03

    申请人: Robert Reiner

    发明人: Robert Reiner

    IPC分类号: G06K19/077 G06K7/08 G06K19/00

    CPC分类号: G06K19/07756 G06K19/07749

    摘要: A data carrier configuration includes a semiconductor chip. A first conductor loop is connected to the semiconductor chip and has at least one winding and a cross-sectional area with approximately the dimensions of the semiconductor chip. At least one second conductor loop has at least one winding, a cross-sectional area with approximately the dimensions of the data carrier configuration and a region forming a third loop with approximately the dimensions of the first conductor loop. The third loop inductively couples the first conductor loop and the at least one second conductor loop to one another. The first and third conductor loops are disposed substantially concentrically.

    摘要翻译: 数据载体配置包括半导体芯片。 第一导体环连接到半导体芯片,并且具有至少一个绕组和具有近似于半导体芯片的尺寸的横截面面积。 至少一个第二导体环具有至少一个绕组,具有大致数据载体构造的尺寸的横截面面积和形成具有大致第一导体环的尺寸的第三环的区域。 第三回路将第一导体回路和至少一个第二导体回路互相耦合。 第一和第三导体环基本上同心地设置。

    Monolithically integrable MOS-comparator circuit
    39.
    发明授权
    Monolithically integrable MOS-comparator circuit 失效
    单片可积分MOS比较器电路

    公开(公告)号:US4617549A

    公开(公告)日:1986-10-14

    申请号:US745693

    申请日:1985-06-17

    申请人: Robert Reiner

    发明人: Robert Reiner

    摘要: An integrated semiconductor circuit for an analog-to-digital converter according to the parallel method, includes a multiplicity of identical comparators and a multiplicity of NOR gates. The comparators are addressable in a staggered manner at reference inputs thereof by a respective reference voltage and at signal inputs thereof jointly by a signal to be evaluated. Each of the comparators are respectively connected by a respective first signal output thereof to a first input of a respective one of the NOR gates forming a weighting stage with the respective comparator. The respective comparator is further connected by the respective first signal output thereof to a second input of another of the NOR gates associated with another of the comparators addressable by a next higher reference voltage. The respective comparator is also connected by respective second signal output thereof to a third input of a further one of the NOR gates associated with yet another of the comparators addressable by a next reference voltage. A read-only memory is provided and respective outputs of the NOR gates are connected via respective transfer transistors to respective inputs of the read-only memory. The transfer transistors are commonly connected to a signal transmitting device transmitting clock signals for controlling the outputs of the comparators and the transfer transistors are controlled by one of the clock signals serving for controlling the first signal outputs of the comparators.

    摘要翻译: 根据并行方法的用于模数转换器的集成半导体电路包括多个相同的比较器和多个NOR门。 比较器可以通过相应的参考电压以及其信号输入端以参考输入的交错方式寻址,由待评估的信号联合。 每个比较器分别通过其相应的第一信号输出连接到与各个比较器形成加权级的NOR门中的相应一个的第一输入。 相应的比较器还通过其相应的第一信号输出端连接到另一个NOR门的第二输入端,该第二输入端与另一个比较器相连,可由下一较高参考电压寻址。 相应的比较器也通过其相应的第二信号输出连接到与另一个比较器相关联的另一个NOR门的第三输入,该另一个比较器可由下一个参考电压寻址。 提供只读存储器,并且NOR门的相应输出通过相应的传输晶体管连接到只读存储器的相应输入端。 转移晶体管通常连接到发送用于控制比较器的输出的时钟信号的信号发送装置,并且传输晶体管由用于控制比较器的第一信号输出的时钟信号之一控制。

    Monolithically integrable MOS-comparator circuit
    40.
    发明授权
    Monolithically integrable MOS-comparator circuit 失效
    单片可积分MOS比较器电路

    公开(公告)号:US4532438A

    公开(公告)日:1985-07-30

    申请号:US396142

    申请日:1982-07-07

    申请人: Robert Reiner

    发明人: Robert Reiner

    摘要: A circuit of a monolithically integrable MOS-comparator has a capacitor, a signal input and a reference input of the comparator being alternatingly connected to the capacitor via respective first and second clock-controlled transfer transistors, a first amplifier stage having a control input and an output, the capacitor being directly connected to the control input and being also connected via a third transfer transistor to the output of the first amplifier stage, a second amplifier stage having a control input and an output, the output of the first amplifier stage being further connected via a fourth transfer transistor to the control input of the second amplifier stage. A third amplifier stage identical with the first and second amplifier stages has a signal input and an output, the output of the second amplifier stage being a first signal output of the comparator and being also connected to the signal input of the third amplifier stage. The output of the third amplifier stage as a second signal output of the comparator and as connected via a fifth transfer transistor to the control input of the second amplifier stage. Means for transmitting two clock signals are connected to the first and second transfer transistors, respectively, for alternatingly switching the signal input and the reference input, respectively, of the comparator to the capacitor, the signal-transmitting means being also connected to the third, fourth and fifth transfer transistors for controlling the same.

    摘要翻译: 单片可积分MOS比较器的电路具有电容器,比较器的信号输入端和参考输入端通过相应的第一和第二时钟控制传输晶体管交替地连接到电容器,第一放大器级具有控制输入端和 输出,电容器直接连接到控制输入,并且还经由第三传输晶体管连接到第一放大器级的输出,具有控制输入和输出的第二放大器级,第一放大级的输出进一步 通过第四传输晶体管连接到第二放大级的控制输入。 与第一和第二放大器级相同的第三放大器级具有信号输入和输出,第二放大级的输出是比较器的第一信号输出,并且还连接到第三放大级的信号输入端。 第三放大器级的输出作为比较器的第二信号输出并且经由第五传输晶体管连接到第二放大器级的控制输入端。 用于发送两个时钟信号的装置分别连接到第一和第二传输晶体管,用于将比较器的信号输入和参考输入分别交替地切换到电容器,信号传输装置也连接到第三传输晶体管, 第四和第五转移晶体管用于控制它们。