Abstract:
A system for allocating memory (e.g., heap) in multi-core processors is provided. In some implementations, the system performs operations comprising receiving, at a shared cache having a plurality of segments, a first data allocation including a plurality of data blocks, and allocating at least a first and second data block from the first allocation. First and second segments in the shared cache can each comprise a plurality of data slots (e.g., of equal length). Allocating the first and second data blocks can include storing the first data block in a data slot of the first segment and storing the second data block in a data slot of the second segment. The plurality of data slots which do not contain data may contain padding, and/or the data slots to which the first and second data blocks are allocated are not adjacent. Related systems, methods, and articles of manufacture are also described.
Abstract:
Disclosed herein are system, method, and computer program product embodiments for of big block allocation of persistent main memory. An embodiment operates by receiving an allocation request for memory of a requested size. A free memory block, that exceeds the requested size by a remainder and is available for allocation, is determined. A size of the free memory block is updated to indicate that the size of the free memory block is equal to the remainder size. A new block of the requested size is inserted with an indication that the new block is allocated. A memory address corresponding to the new block is returned.
Abstract:
A database memory manager determines a size class for each of a plurality of memory allocation requests. The memory manager then, based on the determined size classes, assigns which of a plurality of sub-allocators forming part of a plurality of memory pools should handle each memory allocation request. The sub-allocators assignments are based on predefined size ranges for each size class. The corresponding assigned sub-allocators then identify locations within the memory for each memory allocation request. The corresponding assigned sub-allocators next handle the memory allocation requests to allocate memory at the identified locations such that one of the sub-allocators utilizes both thread local storage and core-striped memory management.
Abstract:
Receiving a statement including requests for database operations in a secondary database system storing data replicated from a primary database system by replaying transaction output generated by the primary database system; responsive to receiving the statement, requesting an allocation of memory from the secondary database system to support the requested database operations; generating an aggregated statement memory consumption value based on the amount of memory consumed by all statements executing in the secondary database system that are not associated with replaying the transaction logs; determining that the requested allocation of memory in addition to the aggregated statement memory consumption value exceeds a total statement execution memory limit indicating a total amount of memory that may be allocated to all database operations associated with statement execution in a secondary database system, and denying the requested allocation of memory. Related apparatus, systems, techniques and articles are also described.
Abstract:
Disclosed herein are innovations in memory management and data recovery for systems that operate using storage class memory (SCM), such as non-volatile RAM (NVRAM). The disclosed innovations have particular application to production database systems, where reducing database downtime in the event of a system crash is highly desirable. Embodiments of the disclosed technology can address a variety of problems that exist during a system crash. For example, embodiments of the disclosed technology can be used to address the loss of the physical memory mapping and/or the loss of the CPU cache that typically occurs in the event of a system crash. Furthermore, embodiments of the disclosed technology can be used to prevent data inconsistency and/or memory leak problems that may arise in the event of a system crash.
Abstract:
A system for memory allocation and deallocation with a multi-level memory map is provided. In some implementations, the system performs operations comprising allocating a memory map for addressing a plurality of memory locations in a heap, the memory map comprising a root node, one or more second-level nodes, and a plurality of third-level nodes. The plurality of third-level nodes can comprise third entries for pointing to the memory locations and/or the one or more second-level nodes can comprise a plurality of second entries corresponding to the plurality of third-level nodes. The operations can further include determining a location to store data within the heap and/or tracking the location by placing a pointer within a third-level node of the plurality of third-level nodes and incrementing a counter corresponding to the third-level node. Related systems, methods, and articles of manufacture are also described.
Abstract:
A system for allocating memory (e.g., heap) in multi-core processors is provided. In some implementations, the system performs operations comprising receiving, at a shared cache having a plurality of segments, a first data allocation including a plurality of data blocks, and allocating at least a first and second data block from the first allocation. First and second segments in the shared cache can each comprise a plurality of data slots (e.g., of equal length). Allocating the first and second data blocks can include storing the first data block in a data slot of the first segment and storing the second data block in a data slot of the second segment. The plurality of data slots which do not contain data may contain padding, and/or the data slots to which the first and second data blocks are allocated are not adjacent. Related systems, methods, and articles of manufacture are also described.
Abstract:
Instances of a call stack executing in a database management system and separated by a sampling interval can be compared and upwardly traversed until reaching a point of difference between the instances. A call counter can be incremented for each new frame identified in the second instance of the call stack since the point of difference such that relative call count frequencies of multiple frames (which can include function calls) can be determined. Systems, methods, and computer program products are described.
Abstract:
Disclosed herein are innovations in memory management and data recovery for systems that operate using storage class memory (SCM), such as non-volatile RAM (NVRAM). The disclosed innovations have particular application to production database systems, where reducing database downtime in the event of a system crash is highly desirable. Embodiments of the disclosed technology can address a variety of problems that exist during a system crash. For example, embodiments of the disclosed technology can be used to address the loss of the physical memory mapping and/or the loss of the CPU cache that typically occurs in the event of a system crash. Furthermore, embodiments of the disclosed technology can be used to prevent data inconsistency and/or memory leak problems that may arise in the event of a system crash.
Abstract:
A method is described that involves providing a persisted quantity for a time series time interval to a first transaction, then, providing the same persisted quantity to a second transaction that operates in parallel with the first transaction. The second transaction is not permitted to change the persisted quantity. The method also involves replacing the persisted quantity with a second persisted quantity within the time series. The second persisted quantity is determined by the first transaction. The method also involves writing a persisted quantity change for the time series time interval. The persisted quantity change is determined by the second transaction.