公开(公告)号：US20170324354A1

公开(公告)日：2017-11-09

申请号：US15653835

申请日：2017-07-19

Applicant: Commissariat a I'Energie Atomique et aux Energies Alternatives ,  STMicroelectronics ( Crolles 2) SAS

Inventor： Stephane Monfray ,  Guillaume Sevelli ,  Thomas Skotnicki ,  Phillippe Coronel ,  Frederic Gaillard

IPC: H02N2/18

CPC classification number: H02N2/18 ,  Y10T29/42

Abstract: A system includes a hot source, a cold source, and a device thermally coupled between the hot source and the cold source. The device includes a thermal-mechanical transducer and a mechanical-electrical transducer. The thermal-mechanical transducer includes a band of bimetallic strips linked mechanically together by their longitudinal ends. The band partially suspended over a portion of a substrate. Each bimetallic strip has a first stable state having a first curvature and a second stable state having a second curvature opposite the first curvature, and adjacent bimetallic strips have opposite curvature.

公开(公告)号：US09543436B2

公开(公告)日：2017-01-10

申请号：US14942566

申请日：2015-11-16

Applicant: STMICROELECTRONICS, INC. ,  STMICROELECTRONICS (CROLLES 2) SAS

Inventor： Qing Liu ,  Thomas Skotnicki

IPC: H01L29/10 ,  H01L29/08 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78 ,  H01L21/28 ,  H01L27/12 ,  H01L29/423

CPC classification number: H01L29/7838 ,  H01L21/28114 ,  H01L27/1203 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1033 ,  H01L29/42356 ,  H01L29/66477 ,  H01L29/66545 ,  H01L29/66575 ,  H01L29/66628 ,  H01L29/66651 ,  H01L29/7834

Abstract: An integrated circuit die includes a substrate having a first layer of semiconductor material, a layer of dielectric material on the first layer of semiconductor material, and a second layer of semiconductor material on the layer of dielectric material. An extended channel region of a transistor is positioned in the second layer of semiconductor material, interacting with a top surface, side surfaces, and potentially portions of a bottom surface of the second layer of semiconductor material. A gate dielectric is positioned on a top surface and on the exposed side surface of the second layer of semiconductor material. A gate electrode is positioned on the top surface and the exposed side surface of the second layer of semiconductor material.

Abstract translation: 集成电路管芯包括具有第一半导体材料层的衬底，第一半导体材料层上的介电材料层，以及介电材料层上的第二层半导体材料。 晶体管的扩展沟道区域位于第二半导体材料层中，与第二半导体材料层的顶表面，侧表面和潜在部分相互作用。 栅电介质位于第二层半导体材料的顶表面和暴露的侧表面上。 栅电极位于第二半导体材料层的顶表面和暴露的侧表面上。

公开(公告)号：US09502505B2

公开(公告)日：2016-11-22

申请号：US14587849

申请日：2014-12-31

Applicant: STMICROELECTRONICS, INC. ,  STMICROELECTRONICS (CROLLES 2) SAS

Inventor： Qing Liu ,  Thomas Skotnicki

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/06 ,  H01L29/10 ,  H01L29/08

CPC classification number: H01L29/7838 ,  H01L21/28114 ,  H01L27/1203 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1033 ,  H01L29/42356 ,  H01L29/66477 ,  H01L29/66545 ,  H01L29/66575 ,  H01L29/66628 ,  H01L29/66651 ,  H01L29/7834

Abstract: An integrated circuit die includes a substrate having a first layer of semiconductor material, a layer of dielectric material on the first layer of semiconductor material, and a second layer of semiconductor material on the layer of dielectric material. An extended channel region of a transistor is positioned in the second layer of semiconductor material, interacting with a top surface, side surfaces, and potentially portions of a bottom surface of the second layer of semiconductor material. A gate dielectric is positioned on a top surface and on the exposed side surface of the second layer of semiconductor material. A gate electrode is positioned on the top surface and the exposed side surface of the second layer of semiconductor material.

Abstract translation: 集成电路管芯包括具有第一半导体材料层的衬底，第一半导体材料层上的介电材料层，以及介电材料层上的第二层半导体材料。 晶体管的扩展沟道区域位于第二半导体材料层中，与第二半导体材料层的顶表面，侧表面和潜在部分相互作用。 栅电介质位于第二层半导体材料的顶表面和暴露的侧表面上。 栅电极位于第二半导体材料层的顶表面和暴露的侧表面上。

公开(公告)号：US20160155923A1

公开(公告)日：2016-06-02

申请号：US14851536

申请日：2015-09-11

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Emmanuel Dubois ,  Jean-Francois Robillard ,  Stephane Monfray ,  Thomas Skotnicki

IPC: H01L35/32

CPC classification number: H01L35/32 ,  H01L27/16

Abstract: A thermo-electric generator includes a semiconductor membrane with a phononic structure containing at least one P-N junction. The membrane is suspended between a first support designed to be coupled to a cold thermal source and a second support designed to be coupled to a hot thermal source. The structure for suspending the membrane has an architecture allowing the heat flux to be redistributed within the plane of the membrane.

Abstract translation: 热电发生器包括具有包含至少一个P-N结的声子结构的半导体膜。 膜被悬挂在设计成耦合到冷热源的第一支撑件和设计成耦合到热热源的第二支撑件之间。 用于悬浮膜的结构具有允许热通量在膜的平面内重新分布的结构。

公开(公告)号：US20150300328A1

公开(公告)日：2015-10-22

申请号：US14686299

申请日：2015-04-14

Applicant: STMICROELECTRONICS (CROLLES 2) SAS

Inventor： Onoriu Puscasu ,  Stephane Monfray ,  Thomas Skotnicki ,  Christophe Maitre

IPC: F03G7/06 ,  H02N1/08

CPC classification number: F03G7/06 ,  H02N1/08 ,  H02N10/00

Abstract: An electrical generator is composed of a bi-layer membrane enabling the conversion of a thermal energy into electrical energy. The bi-layer membrane is deformable and includes at least two layers having different thermal expansion coefficients. The membrane moves between positions in a reversible fashion in response to heat dissipation and as a function of two flexing temperatures. A magnetic structure associated with the membrane functions to set the flexing temperatures as a function of ambient temperature.

Abstract translation: 发电机由能够将热能转换成电能的双层膜组成。 双层膜是可变形的并且包括具有不同热膨胀系数的至少两层。 膜以可逆的方式响应于散热并作为两个弯曲温度的函数在位置之间移动。 与膜相关的磁性结构用于将弯曲温度设定为环境温度的函数。

公开(公告)号：US20150042205A1

公开(公告)日：2015-02-12

申请号：US14455110

申请日：2014-08-08

Applicant: STMicroelectronics (Crolles 2) SAS ,  Commissariat A L'Energie Atomique et aux Energies Alternatives

Inventor： Stephane Monfray ,  Arthur Arnaud ,  Thomas Skotnicki ,  Onoriu Puscasu ,  Sebastien Boisseau

IPC: H02N10/00

CPC classification number: H02N10/00 ,  F03G7/06 ,  H02N1/08 ,  H02N2/18 ,  Y10T29/4913

Abstract: A device for converting thermal power into electric power includes many conversion cells arranged inside and on top of a substrate. Each conversion cell includes a curved bimetal strip and first and second diodes coupled to the bimetal strip. The diodes are arranged in a semiconductor region of the substrate.

Abstract translation: 用于将热功率转换成电力的装置包括布置在基板的内部和顶部的许多转换单元。 每个转换单元包括弯曲双金属条和耦合到双金属条的第一和第二二极管。 二极管被布置在衬底的半导体区域中。

公开(公告)号：US20140070317A1

公开(公告)日：2014-03-13

申请号：US14077724

申请日：2013-11-12

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Stéphane Monfray ,  Thomas Skotnicki

IPC: H01L29/786

CPC classification number: H01L29/786 ,  H01L29/78648

Abstract: A method for manufacturing a suspended membrane in a single-crystal semiconductor substrate, including the steps of: forming in the substrate an insulating ring delimiting an active area, removing material from the active area, successively forming in the active area a first and a second layers, the second layer being a single-crystal semiconductor layer, etching a portion of the internal periphery of said ring down to a depth greater than the thickness of the second layer, removing the first layer so that the second layer formed a suspended membrane anchored in the insulating ring.

Abstract translation: 一种用于制造单晶半导体衬底中的悬浮膜的方法，包括以下步骤：在衬底中形成限定有源区的绝缘环，从有源区去除材料，在有源区中依次形成第一和第二 层，所述第二层是单晶半导体层，将所述环的内周的一部分蚀刻到大于所述第二层的厚度的深度，去除所述第一层，使得所述第二层形成悬浮膜 在绝缘环中。

公开(公告)号：US20130180562A1

公开(公告)日：2013-07-18

申请号：US13741201

申请日：2013-01-14

Applicant: STMicroelectronics (Crolles 2) SAS ,  Centre National de la Recherche Scientifique

Inventor： Stéphane Monfray ,  Thomas Skotnicki ,  Emmanuel Dubois

IPC: H01L35/32 ,  H01L37/00

CPC classification number: H01L35/32 ,  H01J45/00 ,  H01L37/00

Abstract: A tunnel-effect power converter including first and second electrodes having opposite surfaces, wherein the first electrode includes protrusions extending towards the second electrode.

Abstract translation: 一种隧道效应功率转换器，其包括具有相对表面的第一和第二电极，其中所述第一电极包括朝向所述第二电极延伸的突起。