公开(公告)号：US10706928B2

公开(公告)日：2020-07-07

申请号：US16043425

申请日：2018-07-24

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Francois Tailliet ,  Marc Battista

IPC: G11C14/00 ,  G11C8/10 ,  G11C7/06 ,  G11C11/419 ,  G11C16/08 ,  G11C16/04 ,  G11C16/24

Abstract: Disclosed herein is a method of operating a non-volatile static random access NVSRAM memory formed from words. Each word includes NVSRAM cells, each of those NVSRAM cells having an SRAM cell and an electronically erasable programmable read only memory EEPROM cell. If the SRAM cells of a word have been accessed since powerup, data is read from the NVSRAM cells of that word through the SRAM cells. However, if the SRAM cells of that word have not been written since powerup, data is read from the NVSRAM cells of that word through the EEPROM cells.

公开(公告)号：US09361489B2

公开(公告)日：2016-06-07

申请号：US14739814

申请日：2015-06-15

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Marc Battista ,  Gilles Bas ,  Francois Tailliet

IPC: G06K7/10 ,  G06K19/07 ,  H04B1/18

CPC classification number: G06K7/10158 ,  G06K19/0715 ,  H04B1/18

Abstract: An electromagnetic transponder including a resonant circuit; a rectifying bridge having input terminals connected across the resonant circuit and having rectified output terminals providing an electronic circuit power supply voltage; and a device for limiting the voltage across the resonant circuit, connected between the input terminals of the rectifying bridge.

Abstract translation: 一种包括谐振电路的电磁应答器; 整流桥，其具有连接在谐振电路两端的输入端，并具有提供电子电路电源电压的整流输出端; 以及用于限制连接在整流桥的输入端子之间的谐振电路两端的电压的装置。

公开(公告)号：US09312012B2

公开(公告)日：2016-04-12

申请号：US14632785

申请日：2015-02-26

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Francois Tailliet

IPC: G11C16/14 ,  G11C16/04 ,  G11C16/12 ,  G11C16/34

CPC classification number: G11C16/14 ,  G11C16/0433 ,  G11C16/12 ,  G11C16/349 ,  G11C16/3495

Abstract: A method of programming an EEPROM, including: a first mode where a writing into cells is performed under a first voltage; and a second mode where the writing is performed under a second voltage smaller than the first one.

Abstract translation: 一种编程EEPROM的方法，包括：第一模式，其中在第一电压下执行对单元的写入; 以及在小于第一电压的第二电压下执行写入的第二模式。

公开(公告)号：US20160004890A1

公开(公告)日：2016-01-07

申请号：US14739814

申请日：2015-06-15

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Marc Battista ,  Gilles Bas ,  Francois Tailliet

IPC: G06K7/10

CPC classification number: G06K7/10158 ,  G06K19/0715 ,  H04B1/18

Abstract: An electromagnetic transponder including a resonant circuit; a rectifying bridge having input terminals connected across the resonant circuit and having rectified output terminals providing an electronic circuit power supply voltage; and a device for limiting the voltage across the resonant circuit, connected between the input terminals of the rectifying bridge.

Abstract translation: 一种包括谐振电路的电磁应答器; 整流桥，其具有连接在谐振电路两端的输入端，并具有提供电子电路电源电压的整流输出端; 以及用于限制连接在整流桥的输入端子之间的谐振电路两端的电压的装置。

公开(公告)号：US20150046627A1

公开(公告)日：2015-02-12

申请号：US14452620

申请日：2014-08-06

Applicant: STMICROELECTRONICS (ROUSSET) SAS

Inventor： Francois Tailliet

IPC: G06F13/42 ,  G06F13/40

CPC classification number: G06F13/4282 ,  G06F13/4068 ,  G06F13/4291 ,  G06F2213/0016

Abstract: A communication system includes an I2C bus interconnecting at least one first device and one second device. At least one direct data link, other than the I2C bus, interconnects the first and second devices. The system is configurable to operate in: a first operating mode providing for data only transmission between the first and second devices over the I2C bus; and a second operating mode providing for simultaneous data transmission between the first and second devices over both the I2C bus and said data link.

Abstract translation: 通信系统包括互连至少一个第一设备和一个第二设备的I2C总线。 除了I2C总线之外，至少有一个直接数据链路将第一和第二设备互连。 该系统可配置为：第一操作模式，其通过I2C总线提供第一和第二设备之间仅数据传输; 以及提供在I2C总线和所述数据链路两者之间在第一和第二设备之间同时进行数据传输的第二操作模式。

公开(公告)号：US20130311855A1

公开(公告)日：2013-11-21

申请号：US13897940

申请日：2013-05-20

Applicant: STMICROELECTRONICS (ROUSSET) SAS

Inventor： Francois Tailliet

IPC: G06F11/10

CPC classification number: G06F11/1068 ,  G06F11/1052

Abstract: Method for processing a non-volatile memory designed to store words containing data bits and control bits allowing an error correction with an error correction code, the method comprising the storage of information in the memory plane comprising an operation for writing in the memory plane at least one digital word modified with respect to at least one initial digital word not having any erroneous bit, said at least one modified digital word containing a bit having a modified value with respect to the value of this bit in said at least one initial digital word, the other bits of the modified digital word having values identical to those of these same bits in the initial digital word, the position of the modified bit in said at least one modified digital word defining the value of the digital information.

Abstract translation: 用于处理非易失性存储器的方法，所述非易失性存储器被设计为存储包含数据位的字和允许使用纠错码进行纠错的控制位，所述方法包括在所述存储器平面中存储信息，所述方法包括至少在所述存储器平面中写入的操作 关于至少一个不具有任何错误位的初始数字字修改的一个数字字，所述至少一个经修改的数字字包含相对于所述至少一个初始数字字中的该位的值具有修改值的位， 修改的数字字的其他位具有与初始数字字中的相同位相同的值，所述修改的位在所述至少一个修改的数字字中定义数字信息的值的位置。