Data on clock lane of source synchronous links

    公开(公告)号:US10033518B2

    公开(公告)日:2018-07-24

    申请号:US15703792

    申请日:2017-09-13

    Abstract: A source synchronous data transmission system includes a data transmitting device and a data receiving device. A dedicated data line carries a data signal from the data transmission device to the data receiving device. A dedicated clock line carries a modulated clock signal from the data transmission device to the data receiving device. The data transmission device includes a clock data driver configured to encode data into the modulated clock signal by modulating an amplitude of the modulated clock signal. Thus, the clock line of the source synchronous data transmission system carries the clock signal and additional data.

    Noise canceling current mirror circuit for improved PSR
    33.
    发明授权
    Noise canceling current mirror circuit for improved PSR 有权
    降噪电流镜电路,改善PSR

    公开(公告)号:US09146574B2

    公开(公告)日:2015-09-29

    申请号:US13784681

    申请日:2013-03-04

    CPC classification number: G05F3/262 G05F3/02

    Abstract: A current mirror circuit provides a current to drive a load. A noise cancelling circuit is provided to keep the load current constant in spite of variations in the supply voltage. The noise cancelling circuit includes an auxiliary current path which branches from the load current path. The length-to-width ratios of transistors of the circuit are selected to provide the desired noise cancellation while maintaining device stability.

    Abstract translation: 电流镜电路提供电流来驱动负载。 提供噪声消除电路以保持负载电流恒定,尽管电源电压的变化。 噪声消除电路包括从负载电流路径分支的辅助电流路径。 选择电路的晶体管的长宽比来提供期望的噪声消除,同时保持器件的稳定性。

    MID-BAND PSRR CIRCUIT FOR VOLTAGE CONTROLLED OSCILLATORS IN PHASE LOCK LOOP
    34.
    发明申请
    MID-BAND PSRR CIRCUIT FOR VOLTAGE CONTROLLED OSCILLATORS IN PHASE LOCK LOOP 有权
    用于电压控制振荡器的相位锁定环路的中频PSRR电路

    公开(公告)号:US20140368281A1

    公开(公告)日:2014-12-18

    申请号:US13919195

    申请日:2013-06-17

    CPC classification number: H03L7/085 H03L7/0995

    Abstract: A circuit generates a compensation signal that can remove noise in a VCO introduced by a supply signal (i.e., supply-side noise). The circuit includes two transistors connected in series. A resistor is connected between the gate of the first transistor and the supply signal, and a capacitor is connected between the gate of the second transistor and the supply signal. The circuit is designed so that the transconductance of one transistor is greater than or equal to twice the transconductance of a second transistor. The compensation signal is supplied through a capacitor, which compensates for capacitors in a VCO, to an internal supply node of the VCO. At the internal supply node, the compensation signal removes (or greatly reduces) the noise introduced by the supply signal noise, resulting in a less-noisy output signal from the VCO.

    Abstract translation: 电路产生可以去除由电源信号引入的VCO(即电源侧噪声)中的噪声的补偿信号。 该电路包括串联连接的两个晶体管。 电阻器连接在第一晶体管的栅极和电源信号之间,电容器连接在第二晶体管的栅极和电源信号之间。 该电路被设计成使得一个晶体管的跨导大于或等于第二晶体管的跨导的两倍。 补偿信号通过补偿VCO中的电容器的电容器提供给VCO的内部电源节点。 在内部电源节点,补偿信号消除(或大大降低)由电源信号噪声引入的噪声,导致VCO噪声较小的输出信号。

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