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公开(公告)号：US20220228310A1
公开(公告)日：2022-07-21
申请号：US17577102
申请日：2022-01-17
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Youngjin CHO , Kanghyun LEE , Byoungyull YANG , Jongho LEE , Sanggyu JUNG
Abstract: A filter device includes a case, an external filter disposed inside the case to filter substances introduced into the case and configured to be movable with respect to the case, and an internal filter disposed inside the external filter to filter the substances introduced into the case and configured to be movable with respect to the external filter.
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公开(公告)号：US20220077235A1
公开(公告)日：2022-03-10
申请号：US17317154
申请日：2021-05-11
Applicant: Samsung Electronics Co., Ltd.
Inventor： Yumin KIM , Seyun KIM , Jinhong KIM , Soichiro MIZUSAKI , Youngjin CHO
Abstract: A memory device may include an insulating structure including a first surface and a protrusion portion protruding from the first surface in a first direction, a recording material layer on the insulating structure and extending along a protruding surface of the protrusion portion to cover the protrusion portion and extending onto the first surface of the insulating structure, a channel layer on the recording material layer and extending along a surface of the recording material layer, a gate insulating layer on the channel layer; and a gate electrode formed on the gate insulating layer at a location facing a second surface of the insulating structure. The second surface of the insulating structure may be a protruding upper surface of the protrusion portion.
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公开(公告)号：US20220020818A1
公开(公告)日：2022-01-20
申请号：US17345423
申请日：2021-06-11
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jinhong KIM , Seyun KIM , Youngjin CHO
Abstract: A vertical nonvolatile memory device including memory cell strings using a resistance change material is provided. Each of the memory cell strings of the nonvolatile memory device includes a semiconductor layer extending in a first direction; a plurality of gates and a plurality of insulators alternately arranged in the first direction; a gate insulating layer extending in the first direction between the plurality of gates and the semiconductor layer and between the plurality of insulators and the semiconductor layer; and a resistance change layer extending in the first direction on a surface of the semiconductor layer. The resistance change layer includes a metal-semiconductor oxide including a mixture of a semiconductor material of the semiconductor layer and a transition metal oxide.
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公开(公告)号：US20210350851A1
公开(公告)日：2021-11-11
申请号：US17385263
申请日：2021-07-26
Inventor： Jungho YOON , Cheol Seong HWANG , Soichiro MIZUSAKI , Youngjin CHO
Abstract: A nonvolatile memory device and a method of operating the same are provided. The nonvolatile memory device may include a memory cell array having a vertical stack-type structure, a control logic, and a bit line. The memory cell array may include memory cells that each include corresponding portions of a semiconductor layer and a resistance change layer. The control logic, in a read operation, may be configured to apply a first voltage to a non-select memory cell and a second voltage to a non-select memory cell. The first voltage turns on current only in the semiconductor layer portion of the non-select memory cell. The second voltage turns on current in both the semiconductor layer and resistance change layer portions of the select memory cell. The bit line may be configured to apply a read voltage to the select memory cell during the read operation.
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公开(公告)号：US20210035641A1
公开(公告)日：2021-02-04
申请号：US16775424
申请日：2020-01-29
Applicant: Samsung Electronics Co. Ltd.
Inventor： Jungho YOON , Seyun KIM , Jinhong KIM , Soichiro MIZUSAKI , Youngjin CHO
IPC: G11C16/10 , H01L27/11582 , G11C16/24 , G11C16/04 , G11C16/26
Abstract: Provided are a non-volatile memory device and an operating method thereof. The non-volatile memory device includes a memory cell array having a vertically stacked structure, a bit line for applying a programming voltage to the memory cell array, and a control logic. The memory cell array includes memory cells that each include a corresponding portion of a semiconductor layer and a corresponding portion of a resistance layer. The memory cells include a non-selected memory cell, a compensation memory cell, and a selected memory cell. The control logic is configured to apply an adjusted program voltage to the selected memory cell, based on applying a first voltage to the compensation memory cell, a second voltage to the selected memory cell, and a third voltage to the non-selected memory cell. The adjusted program voltage may be dropped compared to the programming voltage due to the compensation memory cell.
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Patent Agency Ranking
36.发明申请公开(公告)号：US20200234888A1
公开(公告)日：2020-07-23
申请号：US16837019
申请日：2020-04-01
Inventor： Yoon Chul SON , Minoru OSADA , Takayoshi SASAKI , Chan KWAK , Doh Won JUNG , Youngjin CHO
Abstract: A method of manufacturing a ceramic electronic component includes forming a dielectric layer including a plurality of ceramic nanosheets on a first electrode, treating the dielectric layer with an acid, and forming a second electrode on the dielectric layer, a ceramic electronic component, and an electronic device.
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37.发明申请公开(公告)号：US20190189345A1
公开(公告)日：2019-06-20
申请号：US16100285
申请日：2018-08-10
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Kyoung-Seok MOON , Hyeon Cheol PARK , Chan KWAK , Hyun Sik KIM , Daejin YANG , Youngjin CHO
CPC classification number: H01G4/1227 , H01G4/008 , H01G4/30
Abstract: A ceramic dielectric includes a plurality of semi-conductive grains including a semiconductor oxide including barium (Ba), titanium (Ti), and a rare earth element. A ceramic dielectric also includes an insulative oxide located between adjacent semiconductor grains and an acceptor element including manganese (Mn), magnesium (Mg), aluminum (Al), iron (Fe), scandium (Sc), gallium (Ga), or a combination thereof, a method of manufacturing the ceramic dielectric, and a ceramic electronic component, and an electronic device including the ceramic dielectric.
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38.发明申请公开(公告)号：US20190131075A1
公开(公告)日：2019-05-02
申请号：US16169800
申请日：2018-10-24
Inventor： Hyeon Cheol PARK , Takayoshi SASAKI , Minoru OSADA , Chan KWAK , Daejin YANG , Doh Won JUNG , Youngjin CHO
Abstract: A ceramic electronic component includes a pair of electrodes facing each other and a dielectric layer disposed between the pair of electrodes and including a plurality of ceramic nanosheets, where the plurality of ceramic nanosheets has a multimodal lateral size distribution expressed by at least two separated peaks, a method of manufacturing the same, and an electronic device including the ceramic electronic component.
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公开(公告)号：US20150022948A1
公开(公告)日：2015-01-22
申请号：US14319259
申请日：2014-06-30
Applicant: Samsung Electronics Co., Ltd.
Inventor： Hyo-Joon AN , Youngjin CHO , Youn-Ho HWANG
IPC: H01G4/005
CPC classification number: H01L23/5223 , H01G4/012 , H01G4/232 , H01G4/30 , H01G4/33 , H01L27/0629 , H01L28/60 , H01L2924/0002 , H01L2924/00
Abstract: A capacitor structure includes a first electrode structure and a second electrode structure. The first electrode structure includes a first negative plate and a first positive plate spaced apart from each other. The first electrode structure has a first horizontal capacitance between the first negative plate and the first positive plate. The second electrode structure includes a second positive plate and a second negative plate spaced apart from each other on the first electrode structure. The second electrode structure has a second horizontal capacitance between the second negative plate and the second positive plate. First and second vertical capacitances are formed between the first negative plate and the second positive plate and between the first positive plate and the second negative plate.
Abstract translation: 电容器结构包括第一电极结构和第二电极结构。 第一电极结构包括彼此间隔开的第一负极板和第一正极板。 第一电极结构在第一负极板和第一正极板之间具有第一水平电容。 第二电极结构包括在第一电极结构上彼此间隔开的第二正极板和第二负极板。 第二电极结构在第二负极板和第二正极板之间具有第二水平电容。 第一和第二垂直电容形成在第一负极板和第二正极板之间以及第一正极板和第二负极板之间。
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公开(公告)号：US20240417911A1
公开(公告)日：2024-12-19
申请号：US18612063
申请日：2024-03-21
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jaewan HONG , Dongpil SEO , Taehyun SUNG , Kanghyun LEE , Jaebok LEE , Youngjin CHO
Abstract: A clothes treating apparatus includes a housing, a tub inside the housing, a drainage device configured to discharge water from the tub to an outside of the housing; a filter device configured to be disposed outside the housing and connected to the drainage device to receive water discharged by the drainage device and filter out foreign substances from the received water, the filter device including a coupler on a bottom of the filter device; and an installation device configured to mount the filter device to a surface, the installation device including a supporter, and the supporter including a supporter mounting portion, wherein the installation device is configured so that the supporter is seatable to the surface, and the supporter mounting portion is couplable to the coupler so that, while the supporter is seated to the surface and the supporter mounting portion is coupled to the coupler, the filter device is mounted to the surface.
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