公开(公告)号：US11200967B1

公开(公告)日：2021-12-14

申请号：US15480321

申请日：2017-04-05

申请人： Sandeep Jain

发明人： Sandeep Jain

IPC分类号： G16H10/60

摘要： An application operating on a portable computing device that generates a suggested hypothesis of at least one of: a diagnosis, a treatment, and subsequent medical investigation. The application receives quantified subfactors, collectively defining factors, for each patient. Subfactors of the medical condition are related to the history, symptoms, signs, tests, and responses to the treatment. The application determines an odds ratio for each factor regarding each hypothesized medical condition as well as an associated prevalence. The application can also determine a respective sensitivity and specificity. Posterior probability distribution, such as using Bayesian statistics, can be applied using odds ratios, prevalence, sensitivity specificity, and the associated correlations to determine the suggested hypothesis of the diagnosis, treatment, and any next tests.

公开(公告)号：US08458541B2

公开(公告)日：2013-06-04

申请号：US13071512

申请日：2011-03-25

申请人： Sandeep Jain ,  Nikila Krishnamoorthy ,  Abhishek Chaudhary ,  Nipun Mahajan ,  Saurabh Chauhan

发明人： Sandeep Jain ,  Nikila Krishnamoorthy ,  Abhishek Chaudhary ,  Nipun Mahajan ,  Saurabh Chauhan

IPC分类号： G01R31/28

CPC分类号： G01R31/318547 ,  G01R31/318558

摘要： Scan chains are used to detect faults in integrated circuits but with the size of today's circuits, it is difficult to detect and locate scan chain faults, especially when the scan data in and scan data out have been compressed. A method for debugging scan chains includes selecting a scan chain for debugging using a scan chain selection block and then providing scan test vectors to the selected scan chain. The scan test vectors undergo various scan test stages to generate scan response vectors. The scan response vectors are compared with ideal response vectors to identify a failing scan chain.

摘要翻译： 扫描链用于检测集成电路中的故障，但随着当今电路的大小，难以检测和定位扫描链故障，特别是当扫描数据输入和扫描数据输出被压缩时。 用于调试扫描链的方法包括使用扫描链选择块选择用于调试的扫描链，然后向所选择的扫描链提供扫描测试向量。 扫描测试矢量经历各种扫描测试阶段以产生扫描响应矢量。 将扫描响应向量与理想响应向量进行比较，以识别故障扫描链。

公开(公告)号：US20130117229A1

公开(公告)日：2013-05-09

申请号：US13457497

申请日：2012-04-27

申请人： Sandeep Jain ,  Prakash Chandra Tiwary

发明人： Sandeep Jain ,  Prakash Chandra Tiwary

IPC分类号： G06F17/30

CPC分类号： G06F13/22 ,  G06F11/2082 ,  G06F17/30008 ,  G06F17/30575

摘要： The embodiments herein provide a system and a method for integrating a data from a source to a destination. The method comprises generating a global-id, setting an event-id corresponding to an entity id in the global id, polling a data from a source, sorting changes of a source system based on a time of update and an entity id, creating and comparing an old as of state value and a new as of state value for each field for each update in the entity in the source and destination to detect a conflict on an entity, sending a time of update in the entity and a revision id of a change to the destination, comparing the global id with an event id for each entity at the destination to detect a presence of an entity in the destination and processing an entity at the destination based an event id.

摘要翻译： 这里的实施例提供了用于将来自源到目的地的数据进行集成的系统和方法。 该方法包括生成global-id，设置与全局id中的实体id相对应的事件id，轮询来自源的数据，根据更新时间和实体id对源系统的改变进行排序，创建和 将来自源和目的地中的实体中的每个更新的每个字段的状态值和状态值的新的状态值进行比较以检测实体上的冲突，在实体中发送更新时间和修改ID 将目的地的每个实体的全局id与事件ID进行比较，以检测目的地中的实体的存在并根据事件ID处理目的地的实体。

公开(公告)号：US07747737B1

公开(公告)日：2010-06-29

申请号：US11517232

申请日：2006-09-07

申请人： Manoj Apte ,  Sandeep Jain ,  Fritz Budiyanto ,  Senthil Kumar Duraiswamy ,  Saravanan Deenadayalan ,  Yulianto Kokasih Ko

发明人： Manoj Apte ,  Sandeep Jain ,  Fritz Budiyanto ,  Senthil Kumar Duraiswamy ,  Saravanan Deenadayalan ,  Yulianto Kokasih Ko

IPC分类号： G06F15/173

CPC分类号： H04L43/028 ,  H04L45/10 ,  H04L45/38

摘要： A network device comprises a service card (e.g., a dynamic flow capture (DFC) service card) executing a communication protocol to receive, from one or more control sources, flow capture information specifying at least one destination and criteria for matching one or more packet flows. The network device includes a network interface card to receive a packet from a network, a packet replication module to replicate the packet, and a control unit to provide the replicated packet from the interface card to the DFC service card. The network device includes a filter cache that caches flow capture information recently received from the CSs. The network device may provide real-time intercept and relaying of specified network-based communications. Moreover, the techniques described herein allow CSs to tap packet flows with little delay after specifying flow capture information, e.g., within 50 milliseconds, even under high-volume networks.

摘要翻译： 网络设备包括执行通信协议的服务卡（例如，动态流捕获（DFC）服务卡），以从一个或多个控制源接收指定至少一个目的地的流捕获信息和用于匹配一个或多个分组的标准 流动。 网络设备包括从网络接收分组的网络接口卡，用于复制分组的分组复制模块，以及将接收卡的复制分组提供给DFC服务卡的控制单元。 网络设备包括高速缓存从CS接收到的流捕获信息的过滤器高速缓存。 网络设备可以提供指定的基于网络的通信的实时拦截和中继。 此外，本文描述的技术允许CS在指定流捕获信息（例如，在50毫秒内）甚至在高容量网络下，稍微延迟地敲击分组流。

公开(公告)号：US07421634B2

公开(公告)日：2008-09-02

申请号：US11160235

申请日：2005-06-15

申请人： Naga Satya Srikanth Puvvada ,  Nikila Krishnamoorthy ,  Sandeep Jain ,  Jais Abraham

发明人： Naga Satya Srikanth Puvvada ,  Nikila Krishnamoorthy ,  Sandeep Jain ,  Jais Abraham

IPC分类号： G01R31/28

CPC分类号： G01R31/318594

摘要： According to an aspect of present invention, modules designed to operate with different frequency in functional (normal) mode are tested using a sequential scan based technique at the respective frequencies. In one embodiment the interface logic connecting the two modules is tested for at-speed performance (i.e., the same speed at which the interface would be operated in functional mode during normal operation).

摘要翻译： 根据本发明的一个方面，使用基于顺序扫描的技术在各个频率上测试被设计为在功能（正常）模式下以不同频率工作的模块。 在一个实施例中，连接两个模块的接口逻辑被测试为高速性能（即，在正常操作期间接口将在功能模式下操作的相同速度）。

公开(公告)号：US07404126B2

公开(公告)日：2008-07-22

申请号：US11308481

申请日：2006-03-29

申请人： Sandeep Jain ,  Jais Abraham

发明人： Sandeep Jain ,  Jais Abraham

IPC分类号： G01R31/28

CPC分类号： G01R31/318544 ,  G01R31/318547 ,  G01R31/318566

摘要： Scan tests tolerant to indeterminate states generated in an integrated circuit (IC) when employing signature analysis to analyze test outputs. Bits with indeterminate-state are masked when scanning out the bits from the scan chains to force such indeterminate bits to a known logic level. This prevents a signature generator receiving the outputs of a scan test from generating an invalid signature. In an embodiment, masking information is stored in encoded form in a memory. A decoding circuit decodes the masking information and provides mask data under control from a mask controller. Mask data is sent to a masking circuit which also receives corresponding bits from scan-out vectors, with each scan-out vector being generated by a corresponding one of multiple scan chains. The output of the masking circuit may be provided in a compressed form to the signature generator circuit.

摘要翻译： 当采用签名分析来分析测试输出时，扫描测试可以容忍在集成电路（IC）中产生的不确定状态。 当扫描扫描链中的位以将这种不确定位强制到已知逻辑电平时，具有不确定状态的位被屏蔽。 这防止签名生成器接收到扫描测试的输出而生成无效签名。 在一个实施例中，屏蔽信息以编码形式存储在存储器中。 解码电路对掩蔽信息进行解码，并在掩模控制器的控制下提供掩模数据。 掩模数据被发送到屏蔽电路，屏蔽电路也从扫描向量接收对应的位，每个扫描向量由多个扫描链中相应的一个生成。 掩蔽电路的输出可以以压缩形式提供给签名生成器电路。

公开(公告)号：US20070234150A1

公开(公告)日：2007-10-04

申请号：US11308481

申请日：2006-03-29

申请人： Sandeep Jain ,  Jais Abraham

发明人： Sandeep Jain ,  Jais Abraham

IPC分类号： G01R31/28

CPC分类号： G01R31/318544 ,  G01R31/318547 ,  G01R31/318566

摘要： Scan tests tolerant to indeterminate states generated in an integrated circuit (IC) when employing signature analysis to analyze test outputs. Bits with indeterminate-state are masked when scanning out the bits from the scan chains to force such indeterminate bits to a known logic level. This prevents a signature generator receiving the outputs of a scan test from generating an invalid signature. In an embodiment, masking information is stored in encoded form in a memory. A decoding circuit decodes the masking information and provides mask data under control from a mask controller. Mask data is sent to a masking circuit which also receives corresponding bits from scan-out vectors, with each scan-out vector being generated by a corresponding one of multiple scan chains. The output of the masking circuit may be provided in a compressed form to the signature generator circuit.

摘要翻译： 当采用签名分析来分析测试输出时，扫描测试可以容忍在集成电路（IC）中产生的不确定状态。 当扫描扫描链中的位以将这种不确定位强制到已知逻辑电平时，具有不确定状态的位被屏蔽。 这防止签名生成器接收到扫描测试的输出而生成无效签名。 在一个实施例中，屏蔽信息以编码形式存储在存储器中。 解码电路对掩蔽信息进行解码，并在掩模控制器的控制下提供掩模数据。 掩模数据被发送到屏蔽电路，屏蔽电路也从扫描向量接收对应的位，每个扫描向量由多个扫描链中相应的一个生成。 掩蔽电路的输出可以以压缩形式提供给签名生成器电路。

公开(公告)号：US20060236027A1

公开(公告)日：2006-10-19

申请号：US11093706

申请日：2005-03-30

申请人： Sandeep Jain ,  Jun Shi ,  Animesh Mishra ,  David Wyatt ,  Paul Diefenbaugh ,  Pochang Hsu

发明人： Sandeep Jain ,  Jun Shi ,  Animesh Mishra ,  David Wyatt ,  Paul Diefenbaugh ,  Pochang Hsu

IPC分类号： G06F13/28

CPC分类号： G11C11/40626 ,  G11C7/04 ,  G11C11/406 ,  G11C11/40615 ,  G11C2211/4061 ,  G11C2211/4067

摘要： Self-refresh rates of a memory unit may be managed based on temperature. In one embodiment of the invention, the invention may include measuring the temperature of a memory unit, the memory unit having a self-refresh rate to maintain data integrity, comparing the measured temperature to a threshold, and adjusting the self-refresh rate of the memory unit based on the comparison.

摘要翻译： 可以基于温度来管理存储器单元的自刷新率。 在本发明的一个实施例中，本发明可以包括测量存储器单元的温度，存储器单元具有自刷新率以维持数据完整性，将测量的温度与阈值进行比较，并且调整自刷新率 记忆单元基于比较。

公开(公告)号：US20060133173A1

公开(公告)日：2006-06-22

申请号：US11019881

申请日：2004-12-21

申请人： Sandeep Jain ,  Animesh Mishra ,  John Halbert

发明人： Sandeep Jain ,  Animesh Mishra ,  John Halbert

IPC分类号： G11C7/00

CPC分类号： G11C11/40611 ,  G11C11/406 ,  G11C11/40618 ,  G11C11/40622

摘要： A method, apparatus, and system to enable a partial refresh scheme for DRAM which includes specifying at least a refresh start value, or a refresh start value and a refresh end value, to reduce the number of rows that must be refreshed during a refresh cycle, thus reducing the amount of power consumed during refresh.

摘要翻译： 一种能够实现DRAM的部分刷新方案的方法，装置和系统，其包括至少指定刷新开始值或刷新开始值和刷新结束值，以减少刷新周期期间必须刷新的行数 ，从而减少刷新期间消耗的功率量。

公开(公告)号：US20060004537A1

公开(公告)日：2006-01-05

申请号：US10882546

申请日：2004-06-30

申请人： Sandeep Jain ,  George Vergis ,  Animesh Mishra ,  Jun Shi

发明人： Sandeep Jain ,  George Vergis ,  Animesh Mishra ,  Jun Shi

IPC分类号： G01K1/08 ,  G06F15/00

CPC分类号： G01K7/42

摘要： In one embodiment a memory controller is provided. The memory controller comprises a predictive logic circuit to predict an increase in a current operating temperature of a memory device coupled to the memory controller, based on memory cycles to be issued to the memory device; and a temperature control circuit to perform a temperature control operation wherein if the sum of the current operating temperature and the predicted increase in temperature is greater than a threshold temperature associated with the memory device, then the number of memory cycles issued to the memory device is reduced.

摘要翻译： 在一个实施例中，提供了存储器控制器。 存储器控制器包括预测逻辑电路，用于基于要发送到存储器件的存储器周期来预测耦合到存储器控制器的存储器件的当前工作温度的增加; 以及温度控制电路，用于执行温度控制操作，其中如果当前工作温度和预测的温度升高的总和大于与存储器件相关联的阈值温度，则发出到存储器件的存储器循环的数量是 减少