Abstract:
A self-routing exchange which includes switch modules connected in multiple stages. A synchronous transfer mode (STM) circuit switch module, which is capable of changing over a connection relationship between incoming highways and outgoing highways, is provided between the multistage-connected switch modules and self-routing switch modules. Asynchronous transfer mode (ATM) switch modules are provided as switch modules in preceding and succeeding stages of the circuit switching module. In dependence upon the number m of self-routing switch modules, a controller sets, by means of software, the connection relationship between the incoming and outgoing highways in each of space switches incorporated within the circuit switching module. As a result, the total mn-number of incoming highways from the self-routing switch modules are connected to respective ones of mn-number of outgoing highways set by the controller. In a case where self-routing switch modules are added on later to expand the system, the controller changes the connection relationship between the incoming and outgoing highways in each space switch within the circuit switching module, using software.
Abstract:
In a control system for switching between a first system and a second system of a duplicated selecting structure in an ATM exchange, one of the first and second systems operates as an active system, and the other operates as a standby system. A generator unit writes specific bits into ATM cells received via an input transmission line. The specific bits respectively written into ATM cells to be transferred via the active system indicate a first state, and those respectively written into the ATM cells to be transferred via the standby system indicate a second state. A first table stores the specific bits respectively assigned to VPI/VCI pairs related to the ATM cells transferred via the first system. A second table stores the specific bits respectively assigned to VPI/VCI pairs related to the ATM cells transferred via the second system. A selecting unit compares the specific bits written into the ATM cells with the specific bits stored in the first and second tables by using the VPI/VCI pairs of the ATM cells, and outputs only ATM cells respectively having specific bits respectively indicating the first state to an output transmission line.
Abstract:
An operation apparatus includes a sequencer controlling states of a plurality of operation devices and a configuration memory storing therein configuration information as setting information for each state in the operation device. In the operation apparatus, a path which requires a data buffer and another path which requires no such a data buffer are provided for inputting data to the operation device, a data buffer control part is provided for controlling selection from these two paths and operation of the data buffer, and contents of path selection and operation control of the data buffer carried out by the data buffer control part are set according to the configuration information.
Abstract:
A switch station including an ATM switch; a memory storing control data for operations of the switch station; an intra-station device, accommodating a subscriber line, performing communication operation on subscriber ATM cell; a control processor generating control information in link access protocol (LAP) format; and an interface unit converting LAP control information into ATM cell to the intra-station device through the ATM switch, wherein the control information is communicated according to LAP, the intra-station device receives the control information and transmits a direct memory access request to obtain control data stored in the memory, the interface unit obtains and converts the data format of the control data into ATM cell to transmit to the intra-station device through the switch, and the intra-station device performs the communication operation on the subscriber ATM cell based on the control data received through the switch.
Abstract:
An operation apparatus includes a sequencer controlling states of a plurality of operation devices and a configuration memory storing therein configuration information as setting information for each state in the operation device. In the operation apparatus, a path which requires a data buffer and another path which requires no such a data buffer are provided for inputting data to the operation device, a data buffer control part is provided for controlling selection from these two paths and operation of the data buffer, and contents of path selection and operation control of the data buffer carried out by the data buffer control part are set according to the configuration information.
Abstract:
A peripheral device cable, connected to a peripheral device, integrally incorporates a subscriber link that is a physical line for transmitting subscriber information in synchronization with a highway clock and a control link that is a physical line for transmitting control data in synchronization with the highway clock. A control data converter controls interfacing between the control data transferred over the control link synchronously with the highway clock and control data that a control unit transmits/receives asynchronously with the highway clock. The subscriber link is connected to a switch.
Abstract:
A cell count identifier inserting portion for inserting a cell count identifier into the header portion of a cell is provided at a predetermined position within an exchange and a plurality of cell counting portions for counting a cell into which a cell count identifier is inserted are provided on the downstream side of the cell count identifier inserting portion. A cell loss detecting portion compares the number of cells into which the cell count identifier is inserted with the number of cells counted by each of the cell counting portions, detects cell loss on the basis of the result of the comparisons and specifies the section in which cell loss is caused, if the cell loss is detected.